Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 508

Itanium architecture-based operating systems must not use IA-32 segmentation as a
protected system resource. An Itanium architecture-based operating system must use
virtual memory management defined by the Itanium architecture to secure IA-32 and
Itanium architecture-based applications, memory and I/O devices. The Itanium
architecture is defined to be unsegmented architecture and all Itanium memory
references bypass IA-32 segmentation and protection checks. In addition, Itanium
architecture-based user level code can directly modify IA-32 segment selector and
descriptor values for all segments (including GDT and LDT). If operating systems do not
rely on segmentation for protection, there are no security concerns for exposing IA-32
segment registers and descriptors to Itanium architecture-based user level applications
IA-32 instruction and data reference addresses are generated as 16/32-bit effective
addresses as shown in
effective addresses into 32-bit virtual addresses, the processor then converts the
address into a 64-bit virtual address by zero extension from 32 to 64-bits. Itanium
instructions bypass all of these steps and directly generate addresses within the 64-bit
virtual address space.
For both IA-32 and Itanium instruction set memory references, virtual memory
management defined by the Itanium architecture is used to map a given virtual address
into a physical address. Itanium architecture-based virtual memory management
hardware does not distinguish between Itanium and IA-32 instruction set generated
memory references during the conversion from a virtual to physical address.
Figure 10-4.
IA-32
Displacement
®
Intel Itanium
10.6.1 Virtual Memory References
In the Itanium System Environment the following virtual memory options are available
for supporting IA-32 and Itanium memory references.
• Software TLB fills (TLBs are enabled, but the VHPT is disabled).
• 8-byte short format VHPT, see
page 2:61
• 32-byte long format VHPT.
Itanium virtual memory resources can be used by the operating system for all IA-32
memory references. These resources include virtual Region Registers (RR), Protection
Key Registers (PKR), the Virtual Hash Page Table (VHPT), all supported range of page
sizes, Translation Registers (ITR, DTR), the Translation Cache (ITC, DTC) and the
complete set of Itanium virtual memory management faults defined in
2:260 Volume 2, Part 1: Itanium
Figure 10-2. IA-32 segmentation is then applied to map 32-bit
Virtual Memory Addressing
16/32-bit
Effective
Address
Base
+ Segmen-
Index
tation
®
Base
Section 4.1.5, "Virtual Hash Page Table (VHPT)" on
for details.
®
Architecture-based Operating System Interaction Model with IA-32 Applications
32-bit Virtual
64-bit Virtual
Address
Address
Zero
Extend
64-bit
Physical
Address
TLB
Chapter 5.