Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 309

Table 4-8.
itc.d r
3
itr.i itr[r
itr.d dtr[r
probe r
1
probe.fault r
ptc.l r
3
ptc.g r
3
ptc.ga r
ptc.e r
3
ptr.i r
3
ptr.d r
3
tak r = r
1
thash r
1
ttag r
1
tpa r = r
1
4.1.5 Virtual Hash Page Table (VHPT)
The VHPT is an extension of the TLB hierarchy designed to enhance virtual address
translation performance. The processor's VHPT walker can optionally be configured to
search the VHPT for a translation after a failed instruction or data TLB search. The VHPT
walker provides significant performance enhancements by reducing the rate of flushing
the processor's pipelines due to a TLB Miss fault, and by providing speculative
translation fills concurrent to other processor operations.
The VHPT, resides in the virtual memory space and is configurable as either the primary
page table of the operating system or as a single large translation cache in memory
(see Figure
miss can be raised when the VHPT is referenced. This property allows the VHPT to also
be used as a linear page table.
Volume 2, Part 1: Addressing and Protection
Translation Instructions (Continued)
Mnemonic Description
Insert data
translation cache
Insert instruction
] = r
2 3
translation
register
Insert data
] = r
2 3
translation
register
Probe data TLB for translation
= r , r
3 2
Probe data TLB for translation
, imm
3 2
Purge a translation from local processor instruction
, r
2
and data translation cache
Globally purge a translation from multiple
, r
2
processor's instruction and data translation caches
Globally purge a translation from multiple
, r
3 2
processor's instruction and data translation caches
and remove matching entries from multiple
processor's ALATs
Purge local instruction and data translation cache of
all entries
Purge instruction translation registers
, r
2
Purge data translation registers
, r
2
Obtain data TLB entry protection key
3
Generate translation's VHPT hash address
= r
3
Generate translation tag for VHPT
= r
3
Translate a virtual address to a physical address
3
4-9). Since the VHPT resides in the virtual address space, an additional TLB
Operation
DTC = GR[r ], IFA, ITIR
3
ITR[GR[r ]] = GR[r ], IFA, ITIR
2 3
DTR[GR[r ]] = GR[r ], IFA, ITIR
2 3
Instr. Serialization
Type Requirement
M data
M inst
M data
M none
M none
M data/inst
M data/inst
M data/inst
M data/inst
M inst
M data
M none
M none
M none
M none
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