Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 571

For example, let's say the minimum frequency of P0 is 1 GHz and the maximum
frequency of P0 is 1.5 GHz. If we are at 1 GHz for a time period of 4, 1.25 GHz for a
time period of 16 and 1.5 GHz for a time period of 20, the average performance index
is:
((100 * 4) + (125 * 16) + (150 * 20)) / (5 + 15 + 20) = 135
The performance_index equation for other P-states can be calculated in a similar manner
using their respective frequency index values.
The total performance_index equation for a processor with four P-states (P0, P1, P2, P3)
would be:
((F * time spent in F
0,0
(F * time spent in F
1,0
(F * time spent in F
2,0
(F * time spent in F
3,0
(Total Time)
11.6.1.5 Interaction of P-states with HALT State
It is possible for a logical processor to enter and exit a HALT state between two
consecutive calls to PAL_GET_PSTATE. Since the logical processor is not executing any
instructions while in the HALT state, the performance index contribution during this
period is essentially 0, and will not be accounted for in the performance_index value
returned when the next PAL_GET_PSTATE procedure call is made.
For example, let us assume that the previous PAL_GET_PSTATE procedure was called at
time t , when the processor was operating in state P2. The previous PAL_SET_PSTATE
0
procedure initiated a transition from P2 to P3 at time t
state at time t
when the current PAL_GET_PSTATE procedure was called. The performance_index
returned is calculated as:
performance_index =
((time in P2 after the previous PAL_GET_PSTATE) * (performance_index for P2) +
(time in P3 before entering HALT state) * (performance_index for P3) +
(time in P3 after exiting HALT up to current PAL_GET_PSTATE))) * (performance_index for
P3)) /
(time interval between previous and current GET, excluding time spent in HALT) =
Volume 2, Part 1: Processor Abstraction Layer
) + (F * time spent in F
0,0 0,1
) + (F * time spent in F
1,0 1,1
) + (F * time spent in F
2,0 2,1
) + (F * time spent in F
3,0 3,1
, and exited the HALT state at time t
h1
   
t – t pf + t –
1 0 2 h1
--------------------------------------------------------------------------------------------------------------------- -
 
t – t
2 0
)+ .. (F
0,1
)+ .. (F
1,1
)+ .. (F
2,1
)+ .. (F
3,1
. The processor entered HALT
1
, and was in state P3 at time t
h2
    
t pf + t – t pf
1 3 2 h2
 
– t – t
h2 h1
* time spent in F
0,N 0,N
* time spent in F
1,N 1,N
* time spent in F
2,N 2,N
* time spent in F
3,N 3,N
3
)+
)+
)+
)) /
2
2:323