Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 454

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Notes The Unimplemented Instruction Address trap can be the result of a taken branch, a
taken chk, an rfi, or the execution of a slot 2 instruction in a bundle at the last
implemented address. The lower privilege transfer trap is only taken on a branch
demotion, and not an rfi return.
Processors may optionally report unimplemented instruction addresses with an
Unimplemented Instruction Address fault on the fetch of the unimplemented address.
To system software, this appears the same as if an Unimplemented Instruction Address
trap had been taken, except that:
• any concurrent traps (Single Step, Taken Branch, Lower-Privilege Transfer, FP) will be
taken first
• asynchronous interrupts (such as External interrupt) may be taken with IIP pointing
to the unimplemented address before the Unimplemented Instruction Address fault is
taken
• incomplete register stack frame interrupts may be taken with IIP pointing to the
unimplemented address before the Unimplemented Instruction Address fault is taken
• ISR.ei will be equal to the value of PSR.ri at the time of the fault (and therefore will
not indicate which instruction in the bundle pointed to by IIPA was responsible for the
transition to an unimplemented address).
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0 0
0
8 7 6
0 0 0 0 ss tb 1 0
0 ei 0 ni ir 0 0 0 0 0 0
Volume 2, Part 1: Interruption Vector Descriptions
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