Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 374

5.8.3.7 Performance Monitoring Vector (PMV – CR73)
PMV specifies the external interrupt vector number for Performance Monitoring overflow
interrupts. To ensure that subsequent performance monitor interrupts reflect the new
state of PMV by a given point in program execution, software must perform a data
serialization operation after a PMV write and prior to that point. See
Table 5-13
Figure 5-12.
63
Table 5-13.
Field
vector
m
5.8.3.8 Corrected Machine Check Vector (CMCV – CR74)
CMCV specifies the external interrupt vector number for Corrected Machine Checks. To
ensure that subsequent corrected machine check interrupts reflect the new state of
CMCV by a given point in program execution, software must perform a data
serialization operation after a CMCV write and prior to that point. See
Table 5-14
Figure 5-13.
63
Table 5-14.
Field
vector
m
5.8.3.9 Local Redirection Registers (LRR0-1 – CR80,81)
Local Redirection Registers (LRR0-1) steer external signal-based interrupts that are
directly connected to the local processor to a specific external interrupt vector.
Processors may optionally support two direct external interrupt pins. When supported
these external interrupt signals (pins) are referred to as Local Interrupt 0 (LINT0) and
Local Interrupt 1 (LINT1). Software can query the presence of these pins via the
PAL_PROC_GET_FEATURES procedure call.
To ensure that subsequent interrupts from LINT0 and LINT1 reflect the new state of
LRR prior to a given point in program execution, software must perform a data
serialization operation after an LRR write and prior to that point. In the case when
2:126
for the definitions of the PMV fields.
Performance Monitor Vector (PMV – CR73)
ignored
47
Performance Monitor Vector Fields
Bits
7:0 Vector number to use when generating a Performance Monitor interrupt. Vector values
can be 0, 2, or 16-255. All other vectors are ignored and reserved for future use.
16 Mask: When 1, occurrences of Performance Monitor interrupts are discarded and not
pended. When 0, occurrences of Performance Monitor interrupts are pended.
for the CMCV field definitions.
Corrected Machine Check Vector (CMCV – CR74)
ignored
47
Corrected Machine Check Vector Fields
Bits
7:0 Vector number to use when generating a Corrected Machine Check. Vector values can
be 0, 2, or 16 - 255. All other vectors are ignored and reserved for future use.
16 Mask: When 1, occurrences of Corrected Machine Check interrupts are discarded and
not pended. When 0, occurrences of Corrected Machine Check interrupts are pended.
Figure 5-12
17 16 15 13 12 11 8
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1 3 1 4
Description
17 16 15 13 12 11 8
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1 3 1 4
Description
Volume 2, Part 1: Interruptions
and
7 0
vector
8
Figure 5-13 and
7 0
vector
8