Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 565

Figure 11-10. Example of a P-state Transition Policy
Utilization
11.6.1.1 Power Dependency Domains
The concept of P-states applies to each logical processor, and this gives software the
required granularity to individually control the power/performance characteristics for
each available thread of execution in the system. In the most simplistic case, the
processor package has only one thread of execution, and this allows software to apply
the same P-state policy at the package-level as well as at the logical processor level.
However, with implementations that support multithreading and multiple cores, a single
package can have multiple logical processors (threads of execution). These may have
P-state dependencies among them, which may not allow for individual P-state control
flexibility at the software level. For example, these logical processors may be sharing
the same clock and power delivery network. In such circumstances, software would
need to know which logical processors have dependencies and what the nature of the
dependencies is, so that appropriate coordination techniques can be applied. To allow
the architecture definition to comprehend multi-threaded/multi-core designs, we define
the concept of dependency domain and coordination mechanisms.
A dependency domain is comprised of logical processors that share a common set of
implementation-dependant domain parameters that affect power consumption and
performance for all logical processors in that domain. As an example, a processor
package comprised of two cores controlled by the same clock and power distribution
network are part of the same dependency domain, since changing either the operating
frequency or voltage will affect power consumption and performance for both cores.
Alternatively, if these two cores on the processor package had independent distribution
networks for clocks and power, then a change in the parameters for one core would not
have any effect on the other core, and in that case, the cores would not belong to the
same dependency domain. Software can utilize P-states to effect changes in the domain
Volume 2, Part 1: Processor Abstraction Layer
P0
High
P1
Halt
Transitions initiated
by software
P2
P3
Low
Utilization
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