Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 844

9.1 Transitioning between Intel
Instruction Sets
As mentioned earlier, user-level code can transition from Itanium to IA-32 (or back)
instruction sets without operating system intervention. As described in
"IA-32 Application Execution Model in an Intel
Volume 1, two instructions are provided for this purpose: br.ia (an Itanium
unconditional branch), and JMPE (an IA-32 register indirect and absolute jump). Prior
to executing any IA-32 instructions, however, the Itanium architecture-based operating
system needs to setup an execution environment for executing IA-32 code.
9.1.1 IA-32 Code Execution Environments
Processors based on the Itanium architecture are capable of executing IA-32 code in
real mode, VM86 mode or protected mode. When segmentation is enabled both 16 and
32-bit code are supported. Prior to transferring control to IA-32 code, an Itanium
architecture-based application and/or operating system is expected to setup the
complete IA-32 execution environment in Itanium registers.
In particular, Itanium architecture-based software must setup IA-32 segment descriptor
and selector registers in Itanium application registers, and must ensure that code and
stack segment descriptors (CSD, SSD) are pointing at valid and correctly aligned
memory areas. It is also worth noting that the IA-32 GDT and LDT descriptors are
maintained in GR30 and GR31, and are unprotected from Itanium architecture-based
user-level code. For more details on the IA-32 execution environment please refer to
Section 6.2.2, "IA-32 Application Register State Model" on page
Some IA-32 execution environments may need support from an Itanium
architecture-based operating system. Which IA-32 software environments are
supported by an Itanium architecture-based operating system is determined by the
operating system vendor. Itanium architecture-based platform firmware (SAL) provides
a runtime environment that allows execution of real-mode IA-32 code found in PCI
configuration option ROMs.
9.1.2 br.ia
br.ia is an unconditional indirect branch that transitions from Itanium to IA-32
instruction set. Prior to entering IA-32 code with br.ia, software is also required to
flush the register stack. br.ia sets the size of the current register stack frame to zero.
The register stack is disabled during IA-32 code execution. Because IA-32 code
execution uses Itanium registers, much of the Itanium register state is overwritten and
left in an undefined state when IA-32 code is run. As a result, software can not rely on
the value of such registers across an instruction set transition. Execution of IA-32 code
also invalidates the ALAT. For more details refer to
Fields" on page
2:596
1:118.
® ®
Itanium
® ®
Itanium System Environment" in
1:113.
Table 6-2, "IA-32 Segment Register
Volume 2, Part 2: IA-32 Application Support
and IA-32
Chapter 6,