Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 465

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IA_32_Exception (Break) – INT 3 Trap
Name
Cause
IA-32 breakpoint instruction (INT 3) triggered a trap. Refer to the Intel
IA-32 Architectures Software Developer's Manual for a complete definition of this
trap.
Parameters
IIPA – trapping virtual IA-32 instruction address zero extended to 64-bits.
IIP – next virtual IA-32 instruction address zero extended to 64-bits.
ISR.vector – 3.
ISR.code –Trap Code, indicates Concurrent Single Step condition.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Volume 2, Part 1: IA-32 Interruption Vector Descriptions
rv
3
rv
®
64 and
8
7
6
5
4
3
trap_code
0
0
0 0 0 0 0 0 0 0 0
2
1
0
2:217

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Itanium architecture 2.3

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