Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 692

Hide thumbs Also See for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3:
Table of Contents

Advertisement

PAL_PREFETCH_VISIBILITY
PAL_PREFETCH_VISIBILITY – Make Processor Prefetches Visible
(41)
Used in the architected sequences for memory attribute transitions described in
Purpose:
Section 4.4.11, "Memory Attribute Transition" on page 2:88
of pages) from a one memory attribute to another.
Static Registers Only
Calling Conv:
Physical and Virtual
Mode:
Not dependent
Buffer:
Arguments:
Argument
index
trans_type
Reserved
Reserved
Returns:
Return Value
status
Reserved
Reserved
Reserved
Status:
Status Value
1
0
-2
-3
This call is intended to be used only in the architected sequences described in
Description:
Section 4.4.11, "Memory Attribute Transition" on page
The trans_type input indicates the type of memory attribute transition the user is
making. An input value of 0 is used when transition virtual memory attributes only. A
value of 1 is used when transitioning physical memory attributes only, or when
transitioning memory that may have a combination of virtual and physical memory
attributes. All other values are reserved.
This procedure, when used for transitioning virtual memory attributes, will ensure that
all prefetches that were initiated by the processor to the cacheable, speculative
memory prior to the call, will either not be cached; have been aborted; or are visible to
subsequent fc instructions. (from both the local processor and from remote
processors).
This procedure when used for transitioning physical memory attributes will ensure that
all prefetches that were initiated by the processor to the cacheable, limited speculative
memory prior to the call, will either not be cached; have been aborted; or are visible to
subsequent fc instructions (from both the local processor and from remote
processors). It will also terminate the ability for the processor to make speculative
references to any limited speculation pages. For the processor to make any speculative
reference to a limited speculation page after this call, there must be a verified reference
made to that page after this call. See the discussion on limited speculation in
Section 4.4.6.1, "Limited Speculation and the WBL Physical Addressing Attribute" on
page
2:81.
2:444
Description
Index of PAL_PREFETCH_VISIBILITY within the list of PAL procedures.
Unsigned integer specifying the type of memory attribute transition that is being performed
0
0
Description
Return status of the PAL_PREFETCH_VISIBILITY procedure.
0
0
0
Description
Call completed without error; this call is not necessary on remote processors
Call completed without error; this call must also be performed on all remote processors in the
coherence domain
Invalid argument
Call completed with error
to transition a page (or set
2:88.
Volume 2, Part 1: Processor Abstraction Layer

Advertisement

Table of Contents
loading

This manual is also suitable for:

Itanium architecture 2.3

Table of Contents