Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 600

Scratch
When applied to either an entrypoint or procedure, scratch means that the contents of
the register has no meaning and need not be preserved. Further the register is
available for the storage of local variables. Unless otherwise noted, the register should
not be relied upon to contain any particular value after exit.
Stacked Calling Convention
The firmware calling convention which adheres fully to the Itanium Runtime Calling
Conventions. To use this calling convention, the RSE must be working and usable.
Static Calling Convention
The firmware calling convention which adheres to the Itanium Runtime Calling
Conventions for the static general registers, branch registers, predicate registers, but
for which all other registers are unused except for the RSE control registers. The RSE is
placed in enforced lazy mode, and the stacked general registers or memory are not
referenced.
System Abstraction Layer (SAL)
SAL is firmware that abstracts platform implementation differences for higher level
software. SAL has no knowledge of processor implementation details.
Unchanged
When applied to an entrypoint, unchanged means that the register referenced has not
been changed from the time of the hardware event that caused the entrypoint to be
invoked until it exited to higher level firmware or software. When applied to a
procedure, unchanged means that the register referenced has not been changed from
procedure entry until procedure exit. In all cases, the value at exit is the same as the
value at entry or the occurrence of the hardware event.
Virtual Machine Monitor (VMM)
The VMM is the system software which implements software policies to
manage/support virtualization of processor and platform resources.
Virtual Processor Descriptor (VPD)
Represents the abstraction of the processor resources of a single virtual processor. The
VPD consists of per-virtual-processor control information together with
performance-critical architectural state. See
Descriptor (VPD)" on page 2:325
Virtual Processor State
A memory data structure which represents the architectural state of a virtual processor.
Part of the virtual processor state is located in the Virtual Processor Descriptor (VPD),
and the rest is located in memory data structures maintained by the virtual machine
monitor.
11.9 PAL Code Memory Accesses and Restrictions
PAL issues load and store operations to memory in the following cases with the
following memory attributes:
• During machine check/INIT handling to the min-state save area memory region
registered with PAL using the UC memory attribute.
2:352
Section 11.7.1, "Virtual Processor
for details.
Volume 2, Part 1: Processor Abstraction Layer