Table 392. Tx Buffer And Fifo Element; Table 393. Tx Buffer Element Description - ST STM32G4 Series Reference Manual

FD controller area network (FDCAN)
Field
Rn Bits 23:16
DBm-1[7:0]
Rn Bits 15:8
DBm-2[7:0]
Rn Bits 7:0
DBm-3[7:0]
43.3.6 FDCAN Tx Buffer element
The Tx Buffers section (three elements) can be configured to hold Tx FIFO or Tx Queue.
The Tx Handler distinguishes between Tx FIFO and Tx Queue using the Tx Buffer
configuration FDCAN_TXBC.TFQM . The element size is configured for storage of CAN FD
messages with up to 64 bytes data.
Bit 31
T0 ESI
T1
T2
T3
Tn
Field
T0 Bit 31
(1)
ESI
T0 Bit 30
XTD
T0 Bit 29
(2)
RTR
T0 Bits 28:0
ID[28:0]
T1 Bits 31:24
MM[7:0]
1926/2083
Table 391. Rx FIFO element description (continued)
Data Byte m-1
Data Byte m-2
Data Byte m-3

Table 392. Tx Buffer and FIFO element

24 23
XTD RTR
MM[7:0] EFC Res. FDF BPS DLC[3:0]
DB3[7:0]
DB7[7:0]
DBm[7:0]

Table 393. Tx Buffer element description

Error state indicator
– 0: ESI bit in CAN FD format depends only on error passive flag
– 1: ESI bit in CAN FD format transmitted recessive
Extended identifier
– 0: 11-bit standard identifier
– 1: 29-bit extended identifier
Remote transmission request
– 0: Transmit data frame
– 1: Transmit remote frame
Identifier
Standard or extended identifier depending on bit XTD. A standard identifier has to be
written to ID[28:18].
Message marker
Written by CPU during Tx Buffer configuration. Copied into Tx Event FIFO element for
identification of Tx message status.
RM0440 Rev 1
Description
16 15
ID[28:0]
DB2[7:0]
DB6[7:0]
DBm-1[7:0]
Description
RM0440
8 7 0
Res.
DB1[7:0] D[7:0]
DB5[7:0] DB4[7:0]
DBm-2[7:0] DBm-3[7:0]