ST STM32G4 Series Reference Manual page 1888

Independent watchdog (IWDG)
41.3.3 Hardware watchdog
If the "Hardware watchdog" feature is enabled through the device option bits, the watchdog
is automatically enabled at power-on, and generates a reset unless the
(IWDG_KR)
downcounter is reloaded inside the window.
41.3.4 Low-power freeze
Depending on the IWDG_STOP and IWDG_STBY options configuration, the IWDG can
continue counting or not during the Stop mode and the Standby mode, respectively. If the
IWDG is kept running during Stop or Standby modes, it can wake up the device from this
mode. Refer to
41.3.5 Register access protection
Write access to
and IWDG window register (IWDG_WINR)
write the code 0x0000 5555 in the
register with a different value will break the sequence and register access will be protected
again. This is the case of the reload operation (writing 0x0000 AAAA).
A status register is available to indicate that an update of the prescaler or the down-counter
reload value or the window value is on going.
41.3.6 Debug mode
When the device enters Debug mode (core halted), the IWDG counter either continues to
work normally or stops, depending on the configuration of the corresponding bit in
DBGMCU freeze register. .
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is written by the software before the counter reaches end of count or if the
User and read protection option bytes
IWDG prescaler register
RM0440 Rev 1
for more details.
(IWDG_PR), IWDG reload register (IWDG_RLR)
is protected. To modify them, the user must first
IWDG key register (IWDG_KR). A write access to this
RM0440
IWDG key register