ST STM32G4 Series Reference Manual page 1941

RM0440
Reset value: 0x0000 0707
31 30 29
Res. Res. Res. Res.
15 14 13
Res. PXE REDL RBRS
rc rc
Bits 31: 23 Reserved, must be kept at reset value.
Bits 22: 16 TDCV: Transmitter Delay Compensation Value
Bit 15 Reserved, must be kept at reset value.
Bit 14 PXE: Protocol Exception Event
Bit 13 REDL: Received FDCAN Message
Bit 12 RBRS: BRS flag of last received FDCAN Message
Bit 11 RESI: ESI flag of last received FDCAN Message
Bits 10: 8 DLEC: Data Last Error Code
Bit 7 BO: Bus_Off Status
Bit 6 EW: Warning Status
28 27 26 25
Res. Res. Res.
12 11 10 9
RESI DLEC[2:0]
rc rc rs rs
Position of the secondary sample point, defined by the sum of the measured delay from
FDCAN_TX to FDCAN_RX and TDCR.TDCO. The SSP position is, in the data phase, the
number of minimum time quanta (mtq) between the start of the transmitted bit and the
secondary sample point. Valid values are 0 to 127 mtq.
0: No protocol exception event occurred since last read access
1: Protocol exception event occurred
This bit is set independent of acceptance filtering.
0: Since this bit was reset by the CPU, no FDCAN message has been received
1: Message in FDCAN format with EDL flag set has been received
Access type is RX: reset on read.
This bit is set together with REDL, independent of acceptance filtering.
0: Last received FDCAN message did not have its BRS flag set
1: Last received FDCAN message had its BRS flag set
Access type is RX: reset on read.
This bit is set together with REDL, independent of acceptance filtering.
0: Last received FDCAN message did not have its ESI flag set
1: Last received FDCAN message had its ESI flag set
Access type is RX: reset on read.
Type of last error that occurred in the data phase of a FDCAN format frame with its BRS
flag set. Coding is the same as for LEC. This field will be cleared to 0 when a FDCAN
format frame with its BRS flag set has been transferred (reception or transmission)
without error.
Access type is RS: set on read.
0: The FDCAN is not Bus_Off
1: The FDCAN is in Bus_Off state
0: Both error counters are below the Error_Warning limit of 96
1: At least one of error counter has reached the Error_Warning limit of 96
FD controller area network (FDCAN)
24 23 22
Res. Res.
r
8 7 6
BO EW
rs r r
RM0440 Rev 1
21 20 19 18
TDCV[6:0]
r r r r
5 4 3 2
EP ACT[1:0]
r r r rs
17 16
r r
1 0
LEC[2:0]
rs rs
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