ST STM32G4 Series Reference Manual page 1852

Advanced arm-based 32-bit mcus
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Inter-integrated circuit (I2C) interface
Packet error checking
A packet error checking mechanism has been introduced in the SMBus specification to
improve reliability and communication robustness. Packet Error Checking is implemented
by appending a Packet Error Code (PEC) at the end of each message transfer. The PEC is
calculated by using the C(x) = x
(including addresses and read/write bits).
The peripheral embeds a hardware PEC calculator and allows to send a Not Acknowledge
automatically when the received byte does not match with the hardware calculated PEC.
1852/2083
2
+ x
+ x + 1 CRC-8 polynomial on all the message bytes
8
RM0440 Rev 1
RM0440

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