ST STM32G4 Series Reference Manual page 1944

Advanced arm-based 32-bit mcus
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FD controller area network (FDCAN)
Bits 31: 24 Reserved, must be kept at reset value.
Bit 23 ARA: Access to Reserved Address
Bit 22 PED: Protocol Error in Data Phase (Data Bit Time is used)
Bit 21 PEA: Protocol Error in Arbitration Phase (Nominal Bit Time is used)
Bit 20 WDI: Watchdog Interrupt
Bit 19 BO: Bus_Off Status
Bit 18 EW: Warning Status
Bit 17 EP: Error Passive
Bit 16 ELO: Error Logging Overflow
Bit 15 TOO: Timeout Occurred
Bit 14 MRAF: Message RAM Access Failure
1944/2083
0: No access to reserved address occurred
1: Access to reserved address occurred
0: No protocol error in data phase
1: Protocol error in data phase detected (PSR.DLEC different from 0,7)
0: No protocol error in arbitration phase
1: Protocol error in arbitration phase detected (PSR.LEC different from 0,7)
0: No Message RAM Watchdog event occurred
1: Message RAM Watchdog event due to missing READY
0: Bus_Off status unchanged
1: Bus_Off status changed
0: Error_Warning status unchanged
1: Error_Warning status changed
0: Error_Passive status unchanged
1: Error_Passive status changed
0: CAN Error Logging Counter did not overflow
1: Overflow of CAN Error Logging Counter occurred
0: No timeout
1: Timeout reached
The flag is set when the Rx Handler
l
Has not completed acceptance filtering or storage of an accepted message until the
arbitration field of the following message has been received. In this case acceptance
filtering or message storage is aborted and the Rx Handler starts processing of the
following message.
l
Was unable to write a message to the Message RAM. In this case message storage
is aborted.
In both cases the FIFO put index is not updated. The partly stored message is overwritten
when the next message is stored to this location.
The flag is also set when the Tx Handler was not able to read a message from the
Message RAM in time. In this case message transmission is aborted. In case of a Tx
Handler access failure the FDCAN is switched into Restricted Operation Mode (see
Restricted Operation
mode). To leave Restricted Operation Mode, the Host CPU has to
reset CCCR.ASM.
0: No Message RAM access failure occurred
1: Message RAM access failure occurred
RM0440 Rev 1
RM0440

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