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H'FFBA: Timer Mode Register A TMA: Timer A
Bit :
TMAOV
Initial value :
R/W :
R/(W)*
Timer A interrupt enable bit
Timer A overflow flag
0
[Clearing conditions]
When 0 is written to TMAOV after reading
TMAOV = 1
1
[Setting conditions]
When TCA overflows
Note: * Only 0 can be written to clear the flag.
Rev. 1.0, 02/00, page 1092 of 1141
7
6
5
—
TMAIE
0
0
1
R/W
—
Clock select bits
TMA3
TMA2
TMA1 TMA0
0
0
1
1
0
1
Note: φ = f osc
Clock source, prescaler select bit
0
Timer A clock source is PSS (Initial value)
1
Timer A clock source is PSW
0
Interrupt request by Timer A (TMAI) is disabled (Initial value)
1
Interrupt request by Timer A (TMAI) is enabled
4
3
—
TMA3
1
0
—
R/W
Prescaler frequency division rate (interval timer)
or overflow frequency (time-base)
PSS, φ/16384
0
0
PSS, φ/8192
1
PSS, φ/4096
1
0
PSS, φ/1024
1
PSS, φ/512
0
0
PSS, φ/256
1
PSS, φ/64
1
0
PSS, φ/16
1
0
0
1 s
1
0.5 s
1
0
0.25 s
1
0.03125 s
0
0
Clear PSW and TCA to H'00
1
1
0
1
(Initial value)
2
1
TMA2
TMA1
TMA0
0
0
R/W
R/W
Operation mode
(Initial value)
Interval timer
mode
Clock time
base mode
0
0
R/W
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