Hitachi H8S/2199 Hardware Manual page 1112

H'FFEC: Module Stop Control Register MSTPCRH: System Control
H'FFED: Module Stop Control Register MSTPCRL: System Control
Bit : 7
MSTP15
Initial value :
1
R/W
R/W :
H'FFEE: Serial Timer Control Register STCR: System Control
7
Bit :
—
0
Initial value :
R/W :
—
Rev. 1.0, 02/00, page 1110 of 1141
MSTPCRH
6 5 4 3
MSTP14 MSTP13 MSTP12 MSTP11 MSTP10
1 1 1 1
R/W R/W R/W R/W
Module stop
0
1
6 5
IICX1 IICX0
0 0
R/W R/W
Flash memory control register enable bit
2
I C control
Used combined with CKS2 to CKS0 in ICMR0
Note: * Refer to section 23.2.4, I
2 1 0 7
MSTP9 MSTP8 MSTP7 MSTP6
1 1 1 1
R/W R/W R/W R/W R/W
Module stop mode is released
Module stop mode is set
4 3
FLSHE
—
0 0
R/W
—
OSD ROM enable
0 OSD ROM is accessed by OSD
1 OSD ROM is accessed by CPU
0 Flash memory control register is not selected (Initial value)
1 Flash memory control register is selected
2
C Bus Mode Register (ICMR)
MSTPCRL
6 5 4 3 2
MSTP5 MSTP4 MSTP3 MSTP2
1 1 1 1 1
R/W R/W R/W R/W
(Initial value)
2 1
OSROME
—
0 0
R/W
—
1 0
MSTP1 MSTP0
1 1
R/W R/W
0
—
0
—
(Initial value)