Multiple Master Arbitration - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
1. Master generates a START condition. †
2. Master transmits the START byte (0000 0001). †
3. Master transmits the ACK clock pulse. (Present only to conform with the byte handling format used on
the bus) †
4. No slave sets the ACK signal to 0. †
5. Master generates a RESTART (R) condition. †
A hardware receiver does not respond to the START BYTE because it is a reserved address and resets after
the RESTART condition is generated. †

Multiple Master Arbitration

2
The I C controller bus protocol allows multiple masters to reside on the same bus. If there are two masters
on the same I
time by simultaneously generating a START condition. Once a master (for example, a microcontroller) has
control of the bus, no other master can take control until the first master sends a STOP condition and
places the bus in an idle state. †
Arbitration takes place on the SDA line, while the SCL line is 1. The master, which transmits a 1 while the
other master transmits 0, loses arbitration and turns off its data output stage. The master that lost arbitra‐
tion can continue to generate clocks until the end of the byte transfer. If both masters are addressing the
same slave device, the arbitration could go into the data phase. †
Upon detecting that it has lost arbitration to another master, the I
The following figure illustrates the timing of two masters arbitrating on the bus.
Figure 20-10: Multiple Master Arbitration †
DATA1
DATA2
SDA
SCL
SDA Lines Up with
DATA1 Start Condition
The bus control is determined by address or master code and data sent by competing masters, so there is
no central master nor any order of priority on the bus. †
Arbitration is not allowed between the following conditions: †
I2C Controller
Send Feedback
2
C-bus, there is an arbitration procedure if both try to take control of the bus at the same
MSB
MSB
MSB
2
1
Matching Data
Multiple Master Arbitration
C controller stops generating SCL. †
DATA1 Loses Arbitration
0
SDA Mirrors DATA2
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20-11