Slave Spi And Ssp Serial Transfers - Altera cyclone V Technical Reference

19-28

Slave SPI and SSP Serial Transfers

Slave SPI and SSP Serial Transfers
Figure 19-17: Slave SPI or SSP Serial Transfer Software Flow
To complete a continuous serial transfer from a serial master to the SPI slave, follow these steps:
1. If the SPI slave is enabled, disable it by writing 0 to
2. Set up the SPI control registers for the transfer. You can set these registers in any order.
Altera Corporation
Idle
Disable SPI
Configure Slave by Writing
CTRLR0, CTRLR1, TXFTLR,
RXFTLR, MWCR, & IMR
Enable SPI
Write Data
to Tx FIFO
TMOD = 10
Wait for Master
to Select Slave
Transfer
in Progress
yes
Interrupt Service
Interrupt?
If the transmit FIFO makes the request
no
and all data has not been sent, write
data to the transmit FIFO.
yes If the receive FIFO makes the request,
Busy?
read data from the receive FIFO.
no
Read Rx
FIFO
SSIENR
Routine
TMOD = 01
.
cv_5v4
2016.10.28
SPI Controller
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