Wtop And Wexit Execution Flow - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

There are a few differences in the operation of the while loop branch compared to the
counted loop branch. The while loop branch does not access LC — a branch predicate
determines the behavior of this branch instead. During the kernel and epilog phases,
the branch predicate is one and zero respectively. During the prolog phase, the branch
predicate may be either zero or one depending on the scheme used to program the
while loop.
differences are related to the nature of while loops and will be explained in more depth
with an example in a later section.
Figure 5-2.
5.4.4 Terminology Review
The terms below were introduced in the preceding sections:
Initiation Interval (II)
Prolog
Kernel
Epilog
Source Iteration
Kernel Iteration
Register Rotation
Volume 1, Part 2: Software Pipelining and Loop Support
Also, p16 is always set to zero after rotation. The reasons for these

wtop and wexit Execution Flow

wtop, wexit
== 0 (prolog / epilog)
PR[qp]?
(prolog /
== 1
kernel)
(prolog /
epilog)
EC = EC
PR[63] = 0
RRB - -
wtop: branch
wexit: fall-thru
The number of cycles between the start of successive source iterations in
a software pipelined loop. Each stage of the pipeline is II cycles long.
The first phase of a software-pipelined loop, in which the pipeline is filled.
The second phase of a software-pipelined loop, in which the pipeline is full.
The third phase of a software-pipelined loop, in which the pipeline is
drained.
An iteration of the original source code loop.
An iteration of the loop that implements the software pipeline.
A form of register renaming that is visible to software. Registers are
renamed with respect to a register rename base that is decremented.
> 1
EC?
( epilog)
==1
EC - - EC - -
PR[63] = 0 PR[63] = 0
RRB - - RRB - -
(special unrolled loops)
== 0
EC = EC
PR[63] = 0
RRB = RRB
wtop: fall-thru
wexit: branch
000916
1:189