Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 304

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Figure 4-6.
63
GR[r]
ITIR
IFA
RR[vrn]
4.1.1.6
Page Access Rights
Page granular access controls use 4 levels of privilege. Privilege level 0 is the most
privileged and has access to all privileged instructions; privilege level 3 is least
privileged. Access (including IA-32) to a page is determined by the TLB.ar and TLB.pl
fields, and by the privilege level of the access, as defined in
spills obtain their privilege level from RSC.pl; all other accesses (including IA-32) obtain
their privilege level from PSR.cpl. Within each cell, "–" means no access, "R" means
read access, "W" means write access, "X" means execute access, and "Pn" means
promote PSR.cpl to privilege level "n" when an Enter Privileged Code (epc) instruction
is executed.
Table 4-4.
TLB.ar
0
1
2
3
4
5
2:56
Translation Insertion Format – Not Present
rv/ci
vpn
rv
Page Access Rights
Privilege Level
TLB.pl
3
2
3
R
R
2
R
1
0
3
RX
RX
2
RX
1
0
3
RW
RW
2
RW
1
0
3
RWX
RWX
2
RWX
1
0
3
R
RW
2
R
1
0
3
RX
RX
2
RX
1
0
32 31
12 11
ig
key
a
1
0
R
R
read only
R
R
R
R
R
RX
RX
read, execute
RX
RX
RX
RX
RX
RW
RW
read, write
RW
RW
RW
RW
RW
RWX
RWX
read, write, execute
RWX
RWX
RWX
RWX
RWX
RW
RW
read only / read, write
RW
RW
R
RW
RW
RX
RWX
read, execute / read, write, exec
RX
RWX
RX
RWX
RWX
Volume 2, Part 1: Addressing and Protection
8
7
ps
ig
rid
ig
Table
4-4. RSE fills and
Description
2
1
0
0
rv/ci
rv ig

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