Motorola PowerQUICC II MPC8280 Series Reference Manual page 61

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Figure
Number
30-4
FCC Data Synchronization Register (FDSR) ........................................................... 30-9
30-5
FCC Transmit-on-Demand Register (FTODR)......................................................... 30-9
30-6
FCC Memory Structure........................................................................................... 30-10
30-7
Buffer Descriptor Format........................................................................................ 30-11
30-8
Function Code Register (FCRx) ............................................................................. 30-14
30-9
Output Delay from RTS Asserted ........................................................................... 30-19
30-10
Output Delay from CTS Asserted ........................................................................... 30-19
30-11
CTS Lost ................................................................................................................. 30-20
30-12
Using CD to Control Reception .............................................................................. 30-21
31-1
APC Scheduling Table Mechanism ........................................................................ 31-11
31-2
VBR Pacing Using the GCRA (Leaky Bucket Algorithm) .................................... 31-13
31-3
External CAM Data Input Fields ............................................................................ 31-16
31-4
External CAM Output Fields .................................................................................. 31-16
31-5
Address Compression Mechanism.......................................................................... 31-17
31-6
General VCOFFSET Formula for Contiguous VCLTs ........................................... 31-18
31-7
VP Pointer Address Compression........................................................................... 31-19
31-8
VC Pointer Address Compression .......................................................................... 31-20
31-9
ATM Address Recognition Flowchart .................................................................... 31-21
31-10
MPC8280's ABR Basic Model ............................................................................... 31-22
31-11
ABR Transmit Flow ................................................................................................ 31-24
31-12
ABR Transmit Flow (continued) ............................................................................ 31-25
31-13
ABR Transmit Flow (continued) ............................................................................ 31-26
31-14
ABR Receive Flow ................................................................................................. 31-27
31-15
Rate Format for RM Cells....................................................................................... 31-28
31-16
Rate Formula for RM Cells..................................................................................... 31-29
31-17
Performance Monitoring Cell Structure (FMCs and BRCs)................................... 31-32
31-18
FMC, BRC Insertion ............................................................................................... 31-34
31-19
Format of User-Defined Cells ................................................................................. 31-35
31-20
External CAM Address in UDC Extended Address Mode..................................... 31-36
31-21
ATM-to-TDM Interworking.................................................................................... 31-37
31-22
VCI Filtering Enable Bits ....................................................................................... 31-43
31-23
Global Mode Entry (GMODE) ............................................................................... 31-43
31-24
Example of a 1024-Entry Receive Connection Table ............................................. 31-46
31-25
Receive Connection Table (RCT) Entry ................................................................. 31-47
31-26
AAL5 Protocol-Specific RCT................................................................................. 31-50
31-27
AAL5-ABR Protocol-Specific RCT ....................................................................... 31-51
31-28
AAL1 Protocol-Specific RCT................................................................................. 31-51
31-29
AAL0 Protocol-Specific RCT................................................................................. 31-53
31-30
Transmit Connection Table (TCT) Entry ................................................................ 31-54
31-31
AAL5 Protocol-Specific TCT ................................................................................. 31-58
31-32
AAL1 Protocol-Specific TCT ................................................................................. 31-59
MOTOROLA
Freescale Semiconductor, Inc.
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