Motorola PowerQUICC II MPC8280 Series Reference Manual page 39

Paragraph
Number
32.10 Outgoing CAS Status Register (OCASSR) .................................................... 32-37
32.11 Buffer Descriptors............................................................................................ 32-38
32.11.1 Transmit Buffer Operation........................................................................... 32-38
32.11.2 Receive Buffer Operation ............................................................................ 32-39
32.12 ATM Controller Buffers................................................................................... 32-40
32.12.1 AAL1 CES RxBD........................................................................................ 32-40
32.12.2 AAL1 CES TxBDs ...................................................................................... 32-42
32.13 AAL1 CES Exceptions .................................................................................... 32-43
32.13.1 AAL1 CES Interrupt Queue Entry............................................................... 32-43
32.14 AAL1 Sequence Number (SN) Protection Table ............................................ 32-44
32.15 Internal AAL1 CES Statistics Tables............................................................... 32-45
32.16 External AAL1 CES Statistics Tables.............................................................. 32-46
32.17 CES-Specific Additions to the MCC ............................................................... 32-46
32.18 Application Considerations.............................................................................. 32-46
33.1 Introduction........................................................................................................ 33-1
33.2 Features .............................................................................................................. 33-3
33.3 AAL2 Transmitter.............................................................................................. 33-5
33.3.1 Transmitter Overview .................................................................................... 33-5
33.3.2 Transmit Priority Mechanism ........................................................................ 33-6
33.3.2.1 Round Robin Priority................................................................................. 33-6
33.3.2.2 Fixed Priority ............................................................................................. 33-7
33.3.3 Partial Fill Mode (PFM) ................................................................................ 33-8
33.3.4 No STF Mode ................................................................................................ 33-9
33.3.5 AAL2 Tx Data Structures ............................................................................ 33-10
33.3.5.1 AAL2 Protocol-Specific TCT.................................................................. 33-10
33.3.5.2 CPS Tx Queue Descriptor ....................................................................... 33-13
33.3.5.3 CPS Buffer Structure ............................................................................... 33-15
33.3.5.4 SSSAR Tx Queue Descriptor .................................................................. 33-17
33.3.5.5 SSSAR Transmit Buffer Descriptor......................................................... 33-19
33.4 AAL2 Receiver ................................................................................................ 33-20
33.4.1 Receiver Overview ...................................................................................... 33-20
33.4.2 Mapping of PHY | VP | VC | CID................................................................ 33-22
33.4.3 AAL2 Switching .......................................................................................... 33-23
33.4.4 AAL2 RX Data Structures ........................................................................... 33-25
33.4.4.1 AAL2 Protocol-Specific RCT ................................................................. 33-25
33.4.4.2 CID Mapping Tables and RxQDs............................................................ 33-28
33.4.4.3 CPS Rx Queue Descriptors...................................................................... 33-28
33.4.4.4 CPS Receive Buffer Descriptor (RxBD) ................................................. 33-29
MOTOROLA
Freescale Semiconductor, Inc.
Contents
Title
Chapter 33
ATM AAL2
Contents
For More Information On This Product,
Go to: www.freescale.com
Page
Number
xxxix