Motorola PowerQUICC II MPC8280 Series Reference Manual page 35

Paragraph
Number
31.3.3.2 Determining the Number of Slots in a Scheduling Table ........................ 31-12
31.3.4 Determining the Time-Slot Scheduling Rate of a Channel ......................... 31-12
31.3.5 ATM Traffic Type ........................................................................................ 31-12
31.3.5.1 Peak Cell Rate Traffic Type..................................................................... 31-13
31.3.5.2 Determining the PCR Traffic Type Parameters ....................................... 31-13
31.3.5.3 Peak and Sustain Traffic Type (VBR) ..................................................... 31-13
31.3.5.3.1 Example for Using VBR Traffic Parameters ....................................... 31-14
31.3.5.3.2 Handling the Cell Loss Priority (CLP)—VBR Type 1 and 2 .............. 31-14
31.3.5.4 Peak and Minimum Cell Rate Traffic Type (UBR+)............................... 31-14
31.3.6 Determining the Priority of an ATM Channel ............................................. 31-15
31.4 VCI/VPI Address Lookup Mechanism............................................................ 31-15
31.4.1 External CAM Lookup ................................................................................ 31-15
31.4.2 Address Compression .................................................................................. 31-16
31.4.2.1 VP-Level Address Compression Table (VPLT) ...................................... 31-18
31.4.2.2 VC-Level Address Compression Tables (VCLTs)................................... 31-19
31.4.3 Misinserted Cells ......................................................................................... 31-20
31.4.4 Receive Raw Cell Queue ............................................................................. 31-20
31.5 Available Bit Rate (ABR) Flow Control.......................................................... 31-21
31.5.1 The ABR Model........................................................................................... 31-22
31.5.1.1 ABR Flow Control Source End-System Behavior .................................. 31-22
31.5.1.2 ABR Flow Control Destination End-System Behavior ........................... 31-23
31.5.1.3 ABR Flowcharts ...................................................................................... 31-23
31.5.2 RM Cell Structure ........................................................................................ 31-28
31.5.2.1 RM Cell Rate Representation .................................................................. 31-28
31.5.3 ABR Flow Control Setup............................................................................. 31-29
31.6 OAM Support .................................................................................................. 31-29
31.6.1 ATM-Layer OAM Definitions ..................................................................... 31-30
31.6.2 Virtual Path (F4) Flow Mechanism ............................................................. 31-30
31.6.3 Virtual Channel (F5) Flow Mechanism ....................................................... 31-30
31.6.4 Receiving OAM F4 or F5 Cells................................................................... 31-31
31.6.5 Transmitting OAM F4 or F5 Cells............................................................... 31-31
31.6.6 Performance Monitoring.............................................................................. 31-31
31.6.6.1 Running a Performance Block Test ......................................................... 31-33
31.6.6.2 PM Block Monitoring.............................................................................. 31-33
31.6.6.3 PM Block Generation .............................................................................. 31-34
31.6.6.4 BRC Performance Calculations ............................................................... 31-34
31.7 User-Defined Cells (UDC) .............................................................................. 31-35
31.7.1 UDC Extended Address Mode (UEAD)...................................................... 31-35
31.8 ATM Layer Statistics ....................................................................................... 31-36
31.9 ATM-to-TDM Interworking ............................................................................ 31-36
31.9.1 Automatic Data Forwarding ........................................................................ 31-37
MOTOROLA
Freescale Semiconductor, Inc.
Contents
Title
Contents
For More Information On This Product,
Go to: www.freescale.com
Page
Number
xxxv