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Number
31.9.2
Using Interrupts in Automatic Data Forwarding ......................................... 31-38
31.9.3
Timing Issues ............................................................................................... 31-38
31.9.4
Clock Synchronization (SRTS and Adaptive FIFOs) .................................. 31-38
31.9.5
Mapping TDM Time Slots to VCs............................................................... 31-38
31.9.6
CAS Support ................................................................................................ 31-39
31.9.7
Trunk Condition........................................................................................... 31-39
31.9.8
ATM-to-ATM Data Forwarding................................................................... 31-39
31.10
ATM Memory Structure................................................................................... 31-40
31.10.1
Parameter RAM ........................................................................................... 31-40
31.10.1.1
Determining UEAD_OFFSET (UEAD Mode Only) .............................. 31-42
31.10.1.2
VCI Filtering (VCIF)............................................................................... 31-43
31.10.1.3
Global Mode Entry (GMODE)................................................................ 31-43
31.10.2
Connection Tables (RCT, TCT, and TCTE) ................................................ 31-44
31.10.2.1
ATM Channel Code ................................................................................. 31-45
31.10.2.2
Receive Connection Table (RCT)............................................................ 31-46
31.10.2.2.1
AAL5 Protocol-Specific RCT ............................................................. 31-50
31.10.2.2.2
AAL5-ABR Protocol-Specific RCT.................................................... 31-51
31.10.2.2.3
AAL1 Protocol-Specific RCT ............................................................. 31-51
31.10.2.2.4
AAL0 Protocol-Specific RCT ............................................................. 31-53
31.10.2.2.5
AAL1 CES Protocol-Specific RCT..................................................... 31-54
31.10.2.2.6
AAL2 Protocol-Specific RCT ............................................................. 31-54
31.10.2.3
Transmit Connection Table (TCT)........................................................... 31-54
31.10.2.3.1
AAL5 Protocol-Specific TCT ............................................................. 31-58
31.10.2.3.2
AAL1 Protocol-Specific TCT ............................................................. 31-59
31.10.2.3.3
AAL0 Protocol-Specific TCT ............................................................. 31-60
31.10.2.3.4
AAL1 CES Protocol-Specific TCT ..................................................... 31-60
31.10.2.3.5
AAL2 Protocol-Specific TCT ............................................................. 31-60
31.10.2.3.6
VBR Protocol-Specific TCTE ............................................................. 31-61
31.10.2.3.7
UBR+ Protocol-Specific TCTE........................................................... 31-62
31.10.2.3.8
ABR Protocol-Specific TCTE ............................................................. 31-62
31.10.3
OAM Performance Monitoring Tables ........................................................ 31-65
31.10.4
APC Data Structure ..................................................................................... 31-66
31.10.4.1
APC Parameter Tables ............................................................................. 31-67
31.10.4.2
APC Priority Table .................................................................................. 31-68
31.10.4.3
APC Scheduling Tables ........................................................................... 31-68
31.10.5
ATM Controller Buffer Descriptors (BDs) .................................................. 31-69
31.10.5.1
Transmit Buffer Operation....................................................................... 31-69
31.10.5.2
Receive Buffer Operation ........................................................................ 31-70
31.10.5.2.1
Static Buffer Allocation ....................................................................... 31-70
31.10.5.2.2
Global Buffer Allocation ..................................................................... 31-71
31.10.5.2.3
Free Buffer Pools................................................................................. 31-72
xxxvi
Freescale Semiconductor, Inc.
Contents
Title
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Page
Number
MOTOROLA
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