Motorola PowerQUICC II MPC8280 Series Reference Manual page 63

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32-5 ATM-to-TDM Interworking...................................................................................... 32-8
32-6 TDM-to-ATM Interworking...................................................................................... 32-9
32-7 Mapping CAS Data on a Serial Interface................................................................ 32-11
32-8 Internal CAS Block Formats................................................................................... 32-12
32-9 Mapping CAS Entry................................................................................................ 32-13
32-10 AAL1 CES CAS Routing Table (CRT) .................................................................. 32-13
32-11 AAL1 CES CAS Routing Table Entry.................................................................... 32-13
32-12 CAS Flow TDM-to-ATM........................................................................................ 32-14
32-13 CAS Flow ATM-to-TDM........................................................................................ 32-16
32-14 Data Structure for ATM-to-TDM Adaptive Slip Control ....................................... 32-18
32-15 CES Adaptive Threshold Table............................................................................... 32-18
32-16 Pre-Underrun Sequence .......................................................................................... 32-20
32-17 Pre-Overrun Sequence ............................................................................................ 32-21
32-18 Recoverable Sync Fail Sequence Options .............................................................. 32-22
32-19 3-Step-SN-Algorithm.............................................................................................. 32-23
32-20 Pointer Verification Mechanism.............................................................................. 32-24
32-21 Receive Connection Table (RCT) Entry ................................................................. 32-28
32-22 AAL1 CES Protocol-Specific RCT ........................................................................ 32-30
32-23 Transmit Connection Table (TCT) Entry ............................................................... 32-33
32-24 AAL1 CES Protocol-Specific TCT......................................................................... 32-36
32-25 Outgoing CAS Status Register (OCASSR)............................................................. 32-37
32-26 Transmit Buffers and BD Table Example ............................................................... 32-39
32-27 Receive Buffers and BD Table Example ................................................................ 32-40
32-28 AAL1 CES RxBD................................................................................................... 32-41
32-29 AAL1 CES TxBD ................................................................................................... 32-42
32-30 AAL1 CES Interrupt Queue Entry.......................................................................... 32-43
32-31 AAL1 Sequence Number (SN) Protection Table .................................................... 32-45
32-32 TDM-to-ATM Timing Issue.................................................................................... 32-47
33-1 AAL2 Data Units ...................................................................................................... 33-1
33-2 AAL2 Sublayer Structure.......................................................................................... 33-2
33-3 AAL2 Switching Example ........................................................................................ 33-3
33-4 Round Robin Priority ................................................................................................ 33-7
33-5 Fixed Priority Mode .................................................................................................. 33-8
33-6 AAL2 Protocol-Specific Transmit Connection Table (TCT).................................. 33-10
33-7 CPS Tx Queue Descriptor (TxQD) ......................................................................... 33-14
33-8 Buffer Structure Example for CPS Packets ............................................................ 33-15
33-9 CPS TxBD............................................................................................................... 33-16
33-10 CPS Packet Header Format..................................................................................... 33-17
33-11 SSSAR Tx Queue Descriptor.................................................................................. 33-17
33-12 SSSAR TxBD ......................................................................................................... 33-19
33-13 CID Mapping Process ............................................................................................. 33-23
MOTOROLA
Freescale Semiconductor, Inc.
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