ST STM32F101 series Reference Manual page 336

Advanced arm-based 32-bit mcus

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Bit 2 CCUS: Capture/compare control update selection

Note: This bit acts only on channels that have a complementary output.

Bit 1 Reserved, must be kept at reset value.

Bit 0 CCPC: Capture/compare preloaded control

Note: This bit acts only on channels that have a complementary output.

0: When capture/compare control bits are preloaded (CCPC=1), they are updated by setting

the COMG bit only

1: When capture/compare control bits are preloaded (CCPC=1), they are updated by setting

the COMG bit or when an rising edge occurs on TRGI

0: CCxE, CCxNE and OCxM bits are not preloaded

1: CCxE, CCxNE and OCxM bits are preloaded, after having been written, they are updated

only when a commutation event (COM) occurs (COMG bit set or rising edge detected on

TRGI, depending on the CCUS bit).

Advanced-control timers (TIM1&TIM8)

DocID13902 Rev 15

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