Timer Alternate Function Remapping; Table 41. Adc2 External Trigger Regular Conversion Alternate Function Remapping; Table 42. Tim5 Alternate Function Remapping; Table 43. Tim4 Alternate Function Remapping - ST STM32F101 series Reference Manual

RM0008

Table 41. ADC2 external trigger regular conversion alternate function remapping

Alternate function
ADC2 external trigger regular
conversion
1. Remap available only for high-density and XL-density devices.
9.3.7

Timer alternate function remapping

Timer 4 channels 1 to 4 can be remapped from Port B to Port D. Other timer remapping
possibilities are listed in
configuration register
Alternate function
TIM5_CH4
1. Remap available only for high-density, XL-density and connectivity line devices.
1. Remap available only for 100-pin and for 144-pin package.
Alternate function
1. Remap available only for 64-pin, 100-pin and 144-pin packages.
General-purpose and alternate-function I/Os (GPIOs and AFIOs)
Table 44
(AFIO_MAPR).

Table 42. TIM5 alternate function remapping

TIM5CH4_IREMAP = 0
TIM5 Channel4 is
connected to PA3

Table 43. TIM4 alternate function remapping

Alternate function
TIM4_CH1
TIM4_CH2
TIM4_CH3
TIM4_CH4

Table 44. TIM3 alternate function remapping

TIM3_REMAP[1:0] =
TIM3_CH1
TIM3_CH2
TIM3_CH3
TIM3_CH4
DocID13902 Rev 15
ADC2_ETRGREG_REG = 0
ADC2 external trigger regular
conversion is connected to
EXTI11
to Table 46. Refer to
LSI internal clock is connected to TIM5_CH4
input for calibration purpose.
TIM4_REMAP = 0
PB6
PB7
PB8
PB9
TIM3_REMAP[1:0] =
"00" (no remap) "10" (partial remap)
PA6
PA7
PB0
PB1
ADC2_ETRGREG_REG = 1
ADC2 external trigger regular
conversion is connected to
TIM8_TRGO
AF remap and debug I/O
(1)
TIM5CH4_IREMAP = 1
TIM4_REMAP = 1
PD12
PD13
PD14
PD15
TIM3_REMAP[1:0] =
"11" (full remap)
PB4
PB5
(1)
(1)
(1)
PC6
PC7
PC8
PC9
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