Memory Map; Table 3. Register Boundary Addresses - ST STM32F101 series Reference Manual

Memory and bus architecture
3.3

Memory map

See the datasheet corresponding to your device for a comprehensive diagram of the
memory map.
STM32F10xxx devices.
Boundary address
0xA000 0000 - 0xA000 0FFF
0x5000 0000 - 0x5003 FFFF
0x4003 0000 - 0x4FFF FFFF
0x4002 8000 - 0x4002 9FFF
0x4002 3400 - 0x4002 7FFF
0x4002 3000 - 0x4002 33FF
0x4002 2000 - 0x4002 23FF
0x4002 1400 - 0x4002 1FFF
0x4002 1000 - 0x4002 13FF
0x4002 0800 - 0x4002 0FFF
0x4002 0400 - 0x4002 07FF
0x4002 0000 - 0x4002 03FF
0x4001 8400 - 0x4001 FFFF
0x4001 8000 - 0x4001 83FF
51/1128
Table 3 gives the boundary addresses of the peripherals available in all

Table 3. Register boundary addresses

Peripheral
FSMC
USB OTG FS
Reserved
Ethernet
Reserved
CRC
Flash memory interface
Reserved
Reset and clock control RCC
Reserved
DMA2
DMA1
Reserved
SDIO
DocID13902 Rev 15
Bus Register map
Section 21.6.9 on page 554
Section 28.16.6 on page 905
Section 29.8.5 on page 1061
Section 4.4.4 on page 66
AHB
Section 7.3.11 on page 121
Section 13.4.7 on page 289
Section 13.4.7 on page 289
Section 1.9.16 on page 656
RM0008