Figure 192. Mode2 Write Accesses; Figure 193. Mode B Write Accesses - ST STM32F101 series Reference Manual

RM0008
The differences with mode1 are the toggling of NWE and the independent read and write
timings when extended mode is set (Mode B).

Figure 192. Mode2 write accesses

A[25:0]
NADV
NEx
NOE
NWE
D[15:0]
(ADDSET +1)
HCLK cycles

Figure 193. Mode B write accesses

A[25:0]
NADV
NEx
NOE
NWE
D[15:0]
(ADDSET +1)
HCLK cycles
DocID13902 Rev 15
Flexible static memory controller (FSMC)
Memory transaction
1HCLK
data driven by FSMC
(DATAST + 1)
HCLK cycles
Memory transaction
1HCLK
data driven by FSMC
(DATAST + 1)
HCLK cycles
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