Backup registers (BKP)
Bits 15:10 Reserved, must be kept at reset value.
Bit 9 TIF: Tamper interrupt flag
Note: This bit is reset only by a system reset and wakeup from Standby mode.
Bit 8 TEF: Tamper event flag
Note: A Tamper event resets all the BKP_DRx registers. They are held in reset as long as the
Bits 7:3 Reserved, must be kept at reset value.
Bit 2 TPIE: TAMPER pin interrupt enable
Note: A Tamper interrupt does not wake up the core from low-power modes.
Bit 1 CTI: Clear tamper interrupt
Bit 0 CTE: Clear tamper event
6.4.5
BKP register map
BKP registers are mapped as 16-bit addressable registers as described in the table below:
Offset
Register
0x00
BKP_DR1
0x04
Reset value
85/1128
This bit is set by hardware when a Tamper event is detected and the TPIE bit is set. It is
cleared by writing 1 to the CTI bit (also clears the interrupt). It is also cleared if the TPIE bit is
reset.
0: No Tamper interrupt
1: A Tamper interrupt occurred
This bit is set by hardware when a Tamper event is detected. It is cleared by writing 1 to the
CTE bit.
0: No Tamper event
1: A Tamper event occurred
TEF bit is set. If a write to the BKP_DRx registers is performed while this bit is set, the
value will not be stored.
0: Tamper interrupt disabled
1: Tamper interrupt enabled (the TPE bit must also be set in the BKP_CR register
This bit is reset only by a system reset and wakeup from Standby mode.
This bit is write only, and is always read as 0.
0: No effect
1: Clear the Tamper interrupt and the TIF Tamper interrupt flag.
This bit is write only, and is always read as 0.
0: No effect
1: Reset the TEF Tamper event flag (and the Tamper detector)
Table 17. BKP register map and reset values
Reserved
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DocID13902 Rev 15
RM0008
D[15:0]
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