Ethernet Pins; Table 208. Ethernet Pin Configuration - ST STM32F101 series Reference Manual

Ethernet (ETH): media access control (MAC) with DMA controller
29.3

Ethernet pins

Table 208
signals. It also indicates the pins onto which the signals are input or output, and the pin
configuration.
MAC signals
ETH_MDC
ETH_MII_TXD2
ETH_MII_TX_CLK
ETH_MII_CRS
ETH_MII_RX_CLK
ETH_RMII_REF_CLK
ETH_MDIO
ETH_MII_COL
ETH_MII_RX_DV
ETH_RMII_CRS_DV
ETH_MII_RXD0
ETH_RMII_RXD0
ETH_MII_RXD1
ETH_RMII_RXD1
ETH_MII_RXD2
ETH_MII_RXD3
ETH_MII_RX_ER
ETH_MII_TX_EN
ETH_RMII_TX_EN
ETH_MII_TXD0
ETH_RMII_TXD0
ETH_MII_TXD1
ETH_RMII_TXD1
ETH_PPS_OUT
ETH_MII_TXD3
ETH_RMII_CRS_DV
ETH_MII_RXD0
ETH_RMII_RXD0
ETH_MII_RXD1
ETH_RMII_RXD1
961/1128
shows the MAC signals and the corresponding MII/RMII default or remapped

Table 208. Ethernet pin configuration

MII default MII remap RMII default RMII remap
MDC -
TXD2 -
TX_CLK -
CRS -
RX_CLK -
MDIO -
COL -
RX_DV -
RXD0 -
RXD1 -
RXD2 -
RXD3 -
RX_ER -
TX_EN -
TXD0 -
TXD1 -
PPS_OUT -
TXD3 -
- RX_DV
- RXD0
- RXD1
DocID13902 Rev 15
MDC -
- -
- -
- -
REF_CLK -
MDIO -
- -
CRS_DV -
RXD0 -
RXD1 -
- -
- -
- -
TX_EN -
TXD0 -
TXD1 -
PPS_OUT -
- -
- CRS_DV
- RXD0
- RXD1
Pin Pin configuration
AF output push-pull high-
PC1
speed (50 MHz)
AF output push-pull high-
PC2
speed (50 MHz)
PC3 Floating input (reset state)
PA0 Floating input (reset state)
PA1 Floating input (reset state)
AF output push-pull high-
PA2
speed (50 MHz)
PA3 Floating input (reset state)
PA7 Floating input (reset state)
PC4 Floating input (reset state)
PC5 Floating input (reset state)
PB0 Floating input (reset state)
PB1 Floating input (reset state)
PB10 Floating input (reset state)
AF output push-pull high-
PB11
speed (50 MHz)
AF output push-pull high-
PB12
speed (50 MHz)
AF output push-pull high-
PB13
speed (50 MHz)
AF output push-pull high-
PB5
speed (50 MHz)
AF output push-pull high-
PB8
speed (50 MHz)
PD8 Floating input (reset state)
PD9 Floating input (reset state)
PD10 Floating input (reset state)
RM0008