Usart Interrupts; Table 198. Usart Interrupt Requests; Figure 300. Cts Flow Control - ST STM32F101 series Reference Manual

Universal synchronous asynchronous receiver transmitter (USART)
nCTS
Transmit data register
TDR
TX
27.4

USART interrupts

Transmit data register empty
CTS flag
Transmission complete
Received data ready to be read
Overrun error detected
Idle line detected
Parity error
Break flag
Noise flag, Overrun error and Framing error in multibuffer
communication
1. This bit is used only when data reception is performed by DMA.
The USART interrupt events are connected to the same interrupt vector (see
•
During transmission: Transmission Complete, Clear to Send or Transmit Data Register
empty interrupt.
•
While receiving: Idle Line detection, Overrun error, Receive Data register not empty,
Parity error, LIN break detection, Noise Flag (only in multi buffer communication) and
Framing Error (only in multi buffer communication).
These events generate an interrupt if the corresponding Enable Control Bit is set.
809/1128

Figure 300. CTS flow control

Data 2 empty
Stop Start
Data 1
Bit Bit
Writing data 3 in TDR

Table 198. USART interrupt requests

Interrupt event
DocID13902 Rev 15
CTS
Data 3
Stop Idle Start
Data 2
Bit
Transmission of Data 3
is delayed until nCTS = 0
CTS
empty
Data 3
Bit
Event flag
Control bit
TXE TXEIE
CTS CTSIE
TC TCIE
RXNE
RXNEIE
ORE
IDLE IDLEIE
PE PEIE
LBD LBDIE
(1)
NE or ORE or FE EIE
Figure
RM0008
Enable
301).