RM0008
CK
WS
short
frame
WS
long
frame
For long frame synchronization, the WS signal assertion time is fixed 13 bits in master
mode.
For short frame synchronization, the WS synchronization signal is only one cycle long.
Figure 265. PCM standard waveforms (16-bit extended to 32-bit packet frame)
CK
WS
short
frame
WS
long
frame
Note:
For both modes (master and slave) and for both synchronizations (short and long), the
number of bits between two consecutive pieces of data (and so two synchronization signals)
needs to be specified (DATLEN and CHLEN bits in the SPI_I2SCFGR register) even in
slave mode.
25.4.3
Clock generator
2
The I
S bitrate determines the dataflow on the I
frequency.
2
I
S bitrate = number of bits per channel × number of channels × sampling audio frequency
For a 16-bit audio, left and right channel, the I
2
I
S bitrate = 16 × 2 × F
Figure 264. PCM standard waveforms (16-bit)
SD
MSB
fixed to 13-bit
SD
MSB
S
fixed to 13-bit
16-bit
16-bit
LSB
2
S data line and the I
2
S bitrate is calculated as follows:
DocID13902 Rev 15
Serial peripheral interface (SPI)
LSB MSB
2
S clock signal
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