Table 45. Tim2 Alternate Function Remapping; Table 46. Tim1 Alternate Function Remapping; Table 47. Tim9 Remapping; Table 48. Tim10 Remapping - ST STM32F101 series Reference Manual

General-purpose and alternate-function I/Os (GPIOs and AFIOs)
Alternate function
TIM2_CH1_ETR
TIM2_CH2
TIM2_CH3
TIM2_CH4
1. Remap not available on 36-pin package.
2. TIM_CH1 and TIM_ETR share the same pin but cannot be used at the same time (which is why we have
this notation: TIM2_CH1_ETR).
Alternate functions
1. Remap available only for 100-pin and 144-pin packages.
2. Remap not available on 36-pin package.
Alternate function
TIM9_CH1
TIM9_CH2
1. Refer to the AF remap and debug I/O configuration register
configuration register2
Alternate function
TIM10_CH1
1. Refer to the AF remap and debug I/O configuration register
configuration register2
179/1128

Table 45. TIM2 alternate function remapping

TIM2_REMAP[1:
0] = "00" (no
remap)
(2)
PA0
PA1

Table 46. TIM1 alternate function remapping

TIM1_REMAP[1:0] =
mapping
TIM1_ETR
TIM1_CH1
TIM1_CH2
TIM1_CH3
TIM1_CH4
TIM1_BKIN
TIM1_CH1N
TIM1_CH2N
TIM1_CH3N
(AFIO_MAPR2).
(AFIO_MAPR2).
TIM2_REMAP[1:
0] = "01" (partial
remap)
PA15
PB3
PA2
PA3
TIM1_REMAP[1:0] =
"00" (no remap) "01" (partial remap)
PA12
PA8
PA9
PA10
PA11
(2)
PB12
PB13
(2)
PB14
(2)
PB15

Table 47. TIM9 remapping

TIM9_REMAP = 0
PA2
PA3
Section 9.4.7: AF remap and debug I/O

Table 48. TIM10 remapping

TIM10_REMAP = 0
PB8
Section 9.4.7: AF remap and debug I/O
DocID13902 Rev 15
TIM2_REMAP[1: TIM2_REMAP[1:
0] = "10" (partial 0] = "11" (full
(1)
remap) remap)
PA0
PA1
PB10
PB11
TIM1_REMAP[1:0] =
"11" (full remap)
PE11
PE13
PE14
PA6 PE15
PA7
PB0 PE10
PB1 PE12
(1)
TIM9_REMAP = 1
PE5
PE6
(1)
TIM10_REMAP = 1
PF6
RM0008
(1)
PA15
PB3
(1)
PE7
PE9
PE8