Sdio Adapter; Table 137. Sdio I/O Definitions; Figure 212. Sdio Adapter - ST STM32F101 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0008
Pin
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
22.3.1

SDIO adapter

Figure 212
To AHB
interface
The SDIO adapter is a multimedia/secure digital memory card bus master that provides an
interface to a multimedia card stack or to a secure digital memory card. It consists of five
subunits:
Adapter register block
Control unit
Command path
Data path
Data FIFO
Note:
The adapter registers and FIFO use the AHB bus clock domain (HCLK/2). The control unit,
command path and data path use the SDIO adapter clock domain (SDIOCLK).
Adapter register block
The adapter register block contains all system registers. This block also generates the
signals that clear the static flags in the multimedia card. The clear signals are generated
when 1 is written into the corresponding bit location in the SDIO Clear register.

Table 137. SDIO I/O definitions

Direction
MultiMediaCard/SD/SDIO card clock. This pin is the clock from
Output
host to card.
MultiMediaCard/SD/SDIO card command. This pin is the
Bidirectional
bidirectional command/response signal.
MultiMediaCard/SD/SDIO card data. These pins are the
Bidirectional
bidirectional databus.
shows a simplified block diagram of an SDIO adapter.

Figure 212. SDIO adapter

SDIO adapter
Adapter
registers
FIFO
HCLK/2
DocID13902 Rev 15
Secure digital input/output interface (SDIO)
Description
Control unit
Command
path
Data path
SDIOCLK
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
ai14740
560/1128
612

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