ST STM32F101 series Reference Manual page 680

Advanced arm-based 32-bit mcus
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RM0008
CAN receive FIFO mailbox data length control and time stamp register
(CAN_RDTxR) (x=0..1)
Address offsets: 0x1B4, 0x1C4
Reset value: 0xXXXX XXXX
All RX registers are write protected.
31
30
29
r
r
r
15
14
13
r
r
r
Bits 31:16 TIME[15:0]
Bits 15:8 FMI[7:0]
Bits 7:4 Reserved, must be kept at reset value.
Bits 3:0 DLC[3:0]
28
27
26
25
r
r
r
r
12
11
10
9
FMI[7:0]
r
r
r
r
:
Message time stamp
This field contains the 16-bit timer value captured at the SOF detection.
:
Filter match index
This register contains the index of the filter the message stored in the mailbox passed
through. For more details on identifier filtering please refer to
filtering on page 655
- Filter Match Index paragraph.
:
Data length code
This field defines the number of data bytes a data frame contains (0 to 8). It is 0 in the case
of a remote frame request.
DocID13902 Rev 15
Controller area network (bxCAN)
24
23
22
21
TIME[15:0]
r
r
r
r
8
7
6
5
Reserved
r
20
19
18
17
r
r
r
r
4
3
2
1
DLC[3:0]
r
r
r
Section 24.7.4: Identifier
16
r
0
r
680/1128
689

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