Adc Watchdog High Threshold Register (Adc_Htr); Adc Watchdog Low Threshold Register (Adc_Ltr) - ST STM32F101 series Reference Manual

Analog-to-digital converter (ADC)
11.12.7

ADC watchdog high threshold register (ADC_HTR)

Address offset: 0x24
Reset value: 0x0000 0FFF
31 30 29 28
15 14 13 12
Reserved
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 HT[11:0]: Analog watchdog high threshold
11.12.8

ADC watchdog low threshold register (ADC_LTR)

Address offset: 0x28
Reset value: 0x0000 0000
31 30 29 28
15 14 13 12
Reserved
Bits 31:12 Reserved, must be kept at reset value.
Bits 11:0 LT[11:0]: Analog watchdog low threshold
245/1128
27 26 25
11 10 9
rw rw rw
These bits are written by software to define the high threshold for the analog watchdog.
27 26 25
11 10 9
rw rw rw
These bits are written by software to define the low threshold for the analog watchdog.
24 23 22
Reserved
8 7 6
HT[11:0]
rw rw rw
24 23 22
Reserved
8 7 6
LT[11:0]
rw rw rw
DocID13902 Rev 15
21 20 19 18
5 4 3 2
rw rw rw rw
21 20 19 18
5 4 3 2
rw rw rw rw
RM0008
17 16
1 0
rw rw
17 16
1 0
rw rw