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Features
■
18 GPIOs configurable as GPI, GPO, keypad
matrix, special key or dedicated key function
■
Operating voltage: 1.65 - 3.6 V
■
Hardware keypad controller (KPC)
(10 x 8 matrix with 4 optional dedicated keys
maximum)
■
Keypad controller capable of detecting
keypress in hibernation mode
■
Interrupt output (open drain) pin
■
Advanced power management system
■
Ultra-low standby mode current
■
Programmable pull-up resistors for all GPIO
pins
■
ESD performance on GPIO pins:
– ± 8 kV human body model
(JESD22 A114-C)
■
ESD performance on V
SCL, SDA pins:
– ± 3 kV human body model
(JESD22 A114-C)
Table 1.
Device summary
Order code
STMPE1801BJR
March 2011
18-bit enhanced port expander with keypad controller
, GND, INT
, R
CC
B
Flip-chip CSP 25 (2.03 x 2.03 mm)
Doc ID 17884 Rev 3
Description
The STMPE1801 is a GPIO (general purpose
input/output) port expander capable of interfacing
a main digital ASIC via the two-line bidirectional
2
bus (I
C). A separate GPIO expander IC is often
,
STB
used in mobile multimedia platforms to resolve
the problem of the limited number of GPIOs
typically available on digital engines.
The STMPE1801 offers high flexibility, as each
I/O can be configured as input, output, special
key, keypad matrix or dedicated key function. This
device is designed to include very low quiescent
current, and a wakeup feature for each I/O, to
optimize the power consumption of the device.
Potential applications for the STMPE1801 include
portable media players, game consoles, mobile
and smart phones.
Package
0.4 mm pitch
STMPE1801
Xpander Logic™
Flip-chip CSP 25
(2.03 x 2.03 mm)
Packaging
Tape and reel
1/60
www.st.com
60
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Related Manuals for ST Xpander Logic STMPE1801
Summary of Contents for ST Xpander Logic STMPE1801
- Page 1 Table 1. Device summary Order code Package Packaging Flip-chip CSP 25 (2.03 x 2.03 mm) STMPE1801BJR Tape and reel 0.4 mm pitch March 2011 Doc ID 17884 Rev 3 1/60 www.st.com...
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Page 2: Table Of Contents
Contents STMPE1801 Contents Block diagram ..........4 Pin settings . - Page 3 STMPE1801 Contents ......... . . Clocking system 22 8.0.1 Clock source .
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Page 4: Block Diagram
Block diagram STMPE1801 Block diagram Figure 1. STMPE1801 block diagram 4/60 Doc ID 17884 Rev 3... -
Page 5: Pin Settings
STMPE1801 Pin settings Pin settings Pin connection Figure 2. Pin connection (top-through view) RSTB _ GPIO_ 1 4 GPIO9 GPIO2 GPIO7 GPIO15 GPIO10 GPIO6 GPIO5 GPIO16 GPIO11 GPIO1 GPIO17 GPIO0 GPIO4 GPIO12 INTB GPIO13 GPIO8 GPIO3 Flip-chip CSP 25 Pin description Table 2. -
Page 6: Gpio Pin Functions
Pin settings STMPE1801 Table 2. Pin description (continued) Pin number Type Symbol Name and function GPIO11 GPIO11/COL3 GPIO12 GPIO12/COL4 GPIO13 GPIO13/COL5 GPIO14 GPIO14/COL6 GPIO15 GPIO15/COL7 GPIO16 GPIO16/COL8 GPIO17 GPIO17/COL9 Open drain interrupt output pin. Programmable active low INTB (a pull-up resistor is required) or active high (a pull-down resistor is required). - Page 7 STMPE1801 Pin settings Table 3. GPIO pin function Name Primary function Alternate function GPIO13 GPIO Keypad column 5 GPIO14 GPIO Keypad column 6 GPIO15 GPIO Keypad column 7 GPIO16 GPIO Keypad column 8 GPIO17 GPIO Keypad column 9 The default function is always GPIO. As soon as the key scanning is enabled through the keypad registers, the function is then switched to the key function and then any configuration made in the GPIO registers is ignored.
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Page 8: Maximum Ratings
Maximum ratings STMPE1801 Maximum ratings Stressing the device above the rating listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. -
Page 9: Electrical Specification
STMPE1801 Electrical specification Electrical specification DC electrical characteristics Table 6. DC electrical characteristics Value Symbol Parameter Test conditions Unit − Supply voltage 1.65 − Active current (core 1.8 V µA and analog) - 1 key − 3.3 V µA press −... -
Page 10: Input/Output Dc Electrical Characteristics
Electrical specification STMPE1801 Input/Output DC electrical characteristics Table 7. I/O DC electrical characteristics Value Symbol Parameter Test conditions Unit − − = 1.8 V 0.2 V Low level input voltage − − = 3.3 V 0.2 V − − = 1.8 V 0.8 V High level input voltage −... -
Page 11: Register Address
STMPE1801 Register address Register address Table 8. STMPE1801 register summary table Addres Auto- Register name Description increment Chip CHIP_ID 8-bit CHIP ID identification Version VERSION_ID 8-bit VERSION ID identification SYS_CTRL System control RESERVED INT_CTRL_LOW RESERVED Interrupt control INT_CTRL_HIGH RESERVED INT_EN_MASK_LOW RESERVED Interrupt enable mask... - Page 12 Register address STMPE1801 Table 8. STMPE1801 register summary table Addres Auto- Register name Description increment GPIO_SET_DIR_LOW GPIO set pin GPIO_SET_DIR_MID IO15 IO14 IO13 IO12 IO11 IO10 IO9 direction register GPIO_SET_DIR_HIG RESERVED IO17 IO16 GPIO_RE_LOW GPIO rising GPIO_RE_MID IO15 IO14 IO13 IO12 IO11 IO10 IO9 edge GPIO_RE_HIGH RESERVED...
- Page 13 STMPE1801 Register address Table 8. STMPE1801 register summary table Addres Auto- Register name Description increment KPC_DATA_BYTE0 KPC_DATA_BYTE1 Keypad data KPC_DATA_BYTE2 KPC_DATA_BYTE3 SF7 SF6 SF5 SF4 SF3 SF2 SF1 SF0 KPC_DATA_BYTE4 RESERVED Dedicated Key 0 - 3 Doc ID 17884 Rev 3 13/60...
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Page 14: I2C Specification
I2C specification STMPE1801 C specification The features supported by the I C interface are listed below: ● C slave device ● Operates at V (1.8 - 3.6 V) ● Compliant to Philips I C specification version 2.1 ● Supports standard (up to 100 kbps) and fast (up to 400 kbps) modes ●... -
Page 15: Acknowledge Bit (Ack)
STMPE1801 I2C specification Acknowledge bit (ACK) The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter releases the SDA after sending eight bits of data. During the ninth bit, the receiver pulls the SDA low to acknowledge the receipt of the eight bits of data. The receiver may leave the SDA in high state if it does not acknowledge the receipt of the data. - Page 16 I2C specification STMPE1801 Table 9. Operating modes Mode Byte Programming sequence START, Device Address, R/W =0, Register Address to be written, Data Write, STOP If no STOP is issued, the Data Write can be continuously performed. If the register address falls within the range that allows address auto- increment, then register address auto-increment internally after every Write ≥1...
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Page 17: General Call Address
STMPE1801 I2C specification General call address A general call address is a transaction with the slave address of 0x00 and R/W =0. When a general call address is asserted, the STMPE1801 responds to this transaction with an acknowledgement and behaves as a slave-receiver mode. The meaning of a general call address is defined in the second byte sent by the master-transmitter. -
Page 18: System Controller
System controller STMPE1801 System controller System level registers The system controller is the heart of the STMPE1801. It contains the registers for power control and chip identification. The system registers are: Address Register name CHIP_ID VERSION_ID SYS_CTRL CHIP_ID Chip identification register 8-bit CHIP_ID VERSION_ID Version identification register... -
Page 19: System Control Register
STMPE1801 System controller SYS_CTRL System control register SF_RST RESERVED GPI_DB1 GPI_DB0 RSVD Address: Type: Reset: 0x06 Description: System control register. [7] SF_RST: Soft Reset Writing a ‘1’ to this bit will do a soft reset of the device. Once the reset is done, this bit is cleared to ‘0’... -
Page 20: States Of Operation
System controller STMPE1801 States of operation Figure 4. States of operation R e se t O perational K e yp a d , in te rrupts N o a ctivity & I C tra nsaction (~ 100 μs) (~ 48 μs) H ibernate 32 kH z: O FF AM04176V1... -
Page 21: Keypress Detect In The Hibernate Mode
STMPE1801 System controller Any keypad activity, interrupt event, hotkey activity or VALID I C transaction wakes up the device from Hibernate mode and switches to operational mode automatically. 7.2.2 Keypress detect in the Hibernate mode When in Hibernate mode, any keypress detected causes the system to go into operational mode (~48 . -
Page 22: Clocking System
Clocking system STMPE1801 Clocking system In order to reduce the power consumption, the STMPE1801 turns off the oscillator during Hibernate mode. Figure 5. Clocking system 8.0.1 Clock source By default, when the STMPE1801 powers up, it derives a 32 kHz clock from the internal RC oscillator for its operation. -
Page 23: Power Mode Programming Sequence
STMPE1801 Clocking system 8.0.2 Power mode programming sequence The device enters auto Hibernate mode when there is inactivity for a fixed period of time. To wake up the device, the host is required to: – Send an I C transaction to the device. To do a soft reset to the device, the host needs to do the following: –... -
Page 24: Interrupt System
Interrupt system STMPE1801 Interrupt system The STMPE1801 uses a highly flexible interrupt system. It allows the host system to configure the type of system events that should result in an interrupt, and pinpoints the source of interrupt by status registers. The INT pin can be configured as active high (a pull- down resistor is required), or active low (a pull-up resistor is required). -
Page 25: Interrupt System Register Map
STMPE1801 Interrupt system Interrupt system register map Table 11. Interrupt system register map Auto-increment Address Register name Description (during sequential R/W) INT_CTRL_LOW Interrupt control register INT_CTRL_HIGH INT_EN_MASK_LOW Interrupt enable mask register INT_EN_MASK_HIGH INT_STA_LOW Interrupt status register INT_STA_HIGH INT_EN_GPIO_MASK_LOW INT_EN_GPIO_MASK_MID Interrupt enable GPIO mask register INT_EN_GPIO_MASK_HIGH INT_STA_GPIO_LOW Interrupt status GPIO register... -
Page 26: Interrupt Control Register
Interrupt system STMPE1801 INT_CTRL Interrupt control register INT_CTRL_HIGH INT_CTRL_LOW Reserved Address: 04, 05 Type: R, R/W Reset: 0x00 Description: The interrupt control register is used to configure the interrupt controller. It has global enable interrupt mask bit that controls the interruption to the host. [15:3] RESERVED [2] IC2: Output Interrupt polarity ‘0’... - Page 27 STMPE1801 Interrupt system INT_EN_MASK Interrupt enable mask register INT_EN_MASK_HIGH INT_EN_MASK_LOW RESERVED Address: 06, 07 Type: R, R/W Reset: 0x00 Description: The interrupt enable mask register is used to enable the interruption from a particular interrupt source to the host. [15:4] RESERVED [4:0] IE[x]: Interrupt Enable Mask (where x = 3 to 0) IE0: Default value is 0.
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Page 28: Interrupt Status Register
Interrupt system STMPE1801 INT_STA Interrupt status register INT_STA_HIGH INT_STA _LOW RESERVED Address: 08, 09 Type: Reset: 0x00 Description: The interrupt status register monitors the status of the interruption from a particular interrupt source to the host. The INT_STA bits are constantly updated regardless whether the INT_EN bits are enabled or not. - Page 29 STMPE1801 Interrupt system INT_EN_GPIO_MASK Interrupt enabled GPIO mask register INT_EN_GPIO_MASK_LOW IEG7 IEG6 IEG5 IEG4 IEG3 IEG2 IEG1 IEG0 INT_EN_GPIO_MASK_MID IEG15 IEG14 IEG13 IEG12 IEG11 IEG10 IEG9 IEG8 INT_EN_GPIO_MASK_HIGH Reserved IEG17 IEG16 Address: 0A, 0B, 0C Type: Reset: 0x00 Description: The interrupt enable GPIO mask register is used to enable the interruption from a particular GPIO interrupt source to the host.
- Page 30 Interrupt system STMPE1801 NT_STA_GPIO Interrupt status GPIO register INT_STA_GPIO_LOW ISG7 ISG6 ISG5 ISG4 ISG3 ISG2 ISG1 ISG0 INT_STA_GPIO_MID ISG15 ISG14 ISG13 ISG12 ISG11 ISG10 ISG9 ISG8 INT_STA_GPIO_HIGH Reserved ISG17 ISG16 Address: 0D, 0E, 0F Type: Reset: 0x00 Description: The interrupt status GPIO register monitors the status of the interruption from a particular GPIO pin interrupt source to the host.
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Page 31: Programming Sequence
STMPE1801 Interrupt system Programming sequence To configure and initialize the interrupt controller to allow interruption to host, observe the following steps: Set the INT_EN_MASK and INT_EN_GPIO_MASK registers to the desired values to enable the interrupt sources that are to be expected to receive from. Configure the output interrupt type and polarity and enable the global interrupt mask by writing to the INT_CTRL. -
Page 32: Gpio Controller
GPIO controller STMPE1801 GPIO controller A total of 18 GPIOs are available in the STMPE1801 port expander device. Most of the GPIOs are sharing physical pins with alternate functions. The GPIO controller contains the registers that allow the host system to configure each of the pins into either a GPIO, or one of the alternate functions. -
Page 33: Gpio Control Registers
STMPE1801 GPIO controller 10.1 GPIO control registers A group of registers is used to control the exact function of each of the 18 GPIOs. All the GPIO registers are named as GPIO_xxx_yyy, where: – xxx represents the functional group – yyy represents the byte position of the GPIO (LOW/MID/HIGH) –... -
Page 34: Hotkey Feature
GPIO controller STMPE1801 10.2 Hotkey feature A GPIO is known as ‘Hotkey’ when it is configured to trigger an interruption to the host whenever the GPIO input is being asserted. This feature is applicable in operational mode as well as in Hibernate mode. 10.2.1 Programming sequence for Hotkey Configure the GPIO pin into input direction by setting the corresponding bit in the GPIO... -
Page 35: Keypad Controller
STMPE1801 Keypad controller Keypad controller The keypad controller consists of: – 4 dedicated key controllers that support up to 4 simultaneous dedicated key presses; – a keyscan controller support a maximum of 10 x 8 key matrix with detection of three simultaneous key presses;... - Page 36 Keypad controller STMPE1801 Figure 7. Keypad controller The keypad rows enabled by the KPC_ROW register are normally 'high', with the corresponding input pins pulled up by resistors internally. After reset, all the keypad columns enabled by the KPC_COL register are driven 'low' via weak-pull down resistors. The pull- down resistors on the column are weaker than the pull-up resistors on the rows.
- Page 37 STMPE1801 Keypad controller key-press ROW. This is because the row and column node of key press are shorted together. The state machine continues to poll while the key is still pressed and is reinitialized once all the keys are released. The key detection sequence is described below: The column outputs are initially not driven.
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Page 38: Keypad Configurations
Keypad controller STMPE1801 11.1 Keypad configurations The keypad controller supports the following types of keys: ● Up to 10 columns * 8 rows matrix keys ● Up to 8 special function keys ● Up to 4 dedicated keys Figure 8. Keypad configuration Matrix keypad (10*8) STMPE1801... - Page 39 STMPE1801 Keypad controller Figure 9. Keypad configurations Matrix keypad (10*4) STMPE1801 Input Row 0-7 Dedicated Keys Special Function Keys 10*4 (40) Matrix Keys 4 Special Function Keys 4 Dedicated Keys Doc ID 17884 Rev 3 39/60...
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Page 40: Keypad Controller Registers
Keypad controller STMPE1801 11.2 Keypad controller registers The mapping between the keypad controller (rows and columns) and the GPIO is based on Section 2.3. Table 14. Keypad controller registers Auto-increment Address Register name Description (during sequential R/W) KPC_ROW Keypad row register KPC_COL_LOW Keypad column register KPC_COL_HIGH... - Page 41 STMPE1801 Keypad controller KPC_ROW Keypad controller row register Input Row 0 - 7 Address: Type: Reset: 0x00 Description: Keypad row scanning [7:0] Input row 0 – 7: ‘1’: Turn on scanning of the corresponding row .‘0’: Turn off KPC_COL_HIGH Keypad controller column (HIGH) RESERVED Output Column 8 - 9 Address:...
- Page 42 Keypad controller STMPE1801 KPC_COL_LOW Keypad controller column (LOW) Output Column 0 - 7 Address: Type: Reset: 0x00 Description: Keypad column scanning register. [7:0] OUTPUT COLUMN 0-7: ‘1’: Turn on scanning of the corresponding column. ‘0’: Turn off KPC_CTRL_LOW Keypad controller control (Low) SCAN_COUNT 0 –...
- Page 43 STMPE1801 Keypad controller KPC_CTRL_MID Keypad controller control (Mid) DB[7:2] RSVD Address: Type: Reset: 0x31 Description: Keypad control register. [7:1] DB[7:2] and DB0: DB0 bit is fixed to ‘1’. 10-127ms of de-bounce time De-bounce time range is from 10 ms to 127 ms with 50 ms as the default. [0] RESERVED Doc ID 17884 Rev 3 43/60...
- Page 44 Keypad controller STMPE1801 KPC_CTRL_HIGH Keypad controller control (High) RSVD CMB_KEY RESERVED SCAN_FREQ Address: Type: R/W, R 0x40 Reset: Description: Keypad data register. [7:4] RESERVED [6] CMB_KEY: Combination key mode 1: AND function for combination-key interrupt (default). 0: OR function for combination-key interrupt. [5:2] RESERVED [1:0] SCAN_FREQ: Scan frequency based on internal 32KHz clock...
- Page 45 STMPE1801 Keypad controller The KPC_LOCK bit is only used when a combination key is configured in the device. If there is no combination key programmed, then this bit is not used. This command is used in conjunction with the combination keys. After the device has entered the keypad lock state, all subsequent key presses are ignored until the combinational key(s) are detected.
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Page 46: Data Registers
Keypad controller STMPE1801 11.3 Data registers The KPC_DATA register contains five bytes of information. The first three bytes store the key coordinates and status of any three keys from the normal key matrix, while the fourth byte stores the status of special function keys and the fifth byte consists of the status of dedicated keys. - Page 47 STMPE1801 Keypad controller KPC_DATA_BYTE0 Keypad data byte 0 UP/DWN Address: Type: Reset: 0xF8 Description: Keypad data register. [7] UP/DWN: 0: key-down 1: key-up [6:3] C[3:0]: Column number of key 1 (valid range: 0000-1001) 0x1111: No key [2:0] R[2:0]: Row number of key 1 (valid range: 000-111) KPC_DATA_BYTE1 Keypad data byte 1 UP/DOWN...
- Page 48 Keypad controller STMPE1801 KPC_DATA_BYTE2 Keypad data byte 2 UP/DOWN Address: Type: Reset: 0xF8 Description: Keypad data register. [7] UP/DOWN: 0: key-down 1: key-up [6:3] C[3:0]: Column number of key 3 (valid range: 0000-1001) 0x1111: No key [2:0] R[2:0]: Row number of key 3 (valid range: 000-111) KPC_DATA_BYTE3 Keypad data byte 3 Address:...
- Page 49 STMPE1801 Keypad controller KPC_DATA_BYTE4 Keypad data byte 4 RESERVED Dedicated Key 0 – 3 Address: Type: Reset: 0x0F Description: Keypad data register. [7:4] RESERVED [3:0] Dedicated key [3:0]: 0: Key down 1: Key up Doc ID 17884 Rev 3 49/60...
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Page 50: Keypad Combination Key Registers
Keypad controller STMPE1801 11.4 Keypad combination key registers The 3 keypad controller mask registers contains the key combination to be used to wake up the KPC and send an interrupt to the host system. KPC_COMB_KEY_n Keypad combination [n = 0-2] Address: 38, 39 Type:... -
Page 51: Using The Keypad Controller
STMPE1801 Keypad controller 11.5 Using the keypad controller It is not necessary to explicitly enable the internal pull-up, pull-down and direction by configuring the GPIO control registers. Once a GPIO is enabled for the keypad function, its internal pull-up, pull-down and direction is controlled automatically. The scanning of row inputs should then be enabled for those GPIO ports that are configured as keypad inputs by writing '1's to the corresponding bits in the KPC_ROW register. -
Page 52: Keypad Wakeup From Hibernate Mode
Keypad controller STMPE1801 11.5.3 Keypad wakeup from Hibernate mode The keypad controller is functional in Hibernate mode as long as it is enabled before entering the Hibernate mode. It will then wake the system up into operational mode if a valid key press is detected. -
Page 53: Miscellaneous Features
STMPE1801 Miscellaneous features Miscellaneous features 12.1 Reset The STMPE1801 is equipped with an internal POR circuit that holds the device in reset state, until the clock is steady and V input is valid. The POR circuit is integrated with a filter with minimum 180 ns at 1.8 V V . -
Page 54: Package Mechanical Data
Package mechanical data STMPE1801 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. - Page 55 STMPE1801 Package mechanical data Table 15. Package mechanical data for Flip-chip CSP 25 (2.03 x 2.03 mm) 0.4 mm pitch Millimeters Symbol 0.55 0.605 0.660 0.17 0.205 0.24 0.38 0.42 0.215 0.255 0.295 1.97 2.03 1.97 2.03 0.36 0.44 0.190 0.200 0.210 0.05...
- Page 56 Package mechanical data STMPE1801 Figure 12. Device marking Figure 13. Carrier tape information 1. Pin A1 is at top left corner based on above tape orientation. 56/60 Doc ID 17884 Rev 3...
- Page 57 STMPE1801 Package mechanical data Table 16. Carrier tape specifications Millimeters Symbol 2.06 2.11 2.16 2.06 2.11 2.16 0.64 0.69 0.74 3.45 3.50 3.55 7.90 8.00 8.30 1.95 2.00 2.05 3.90 4.00 4.10 10P0 39.80 40.00 40.20 1.50 1.55 1.60 0.185 0.200 0.215 3.90...
- Page 58 Package mechanical data STMPE1801 Figure 14. Reel drawing (front) Figure 15. Reel drawing (back) 58/60 Doc ID 17884 Rev 3...
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Page 59: Revision History
STMPE1801 Revision history Revision history Table 18. Document revision history Date Revision Changes 15-Nov-2010 Initial release. 13-Dec-2010 Updated: Figure 12 and added footnote related to Figure 09-Mar-2011 Updated: Pin A1 function in Table 2 Section 12.1. Doc ID 17884 Rev 3 59/60... - Page 60 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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