RM0008
10.2.5
External interrupt/event line mapping
The 112 GPIOs are connected to the 16 external interrupt/event lines in the following
manner:
1. To configure the AFIO_EXTICRx for the mapping of external interrupt/event lines onto GPIOs, the AFIO
clock should first be enabled. Refer to
(RCC_APB2ENR)
clock enable register (RCC_APB2ENR)
Figure 21. External interrupt/event GPIO mapping
EXTI0[3:0] bits in AFIO_EXTICR1 register
PA0
PB0
PC0
PD0
PE0
PF0
PG0
EXTI1[3:0] bits in AFIO_EXTICR1 register
PA1
PB1
PC1
PD1
PE1
PF1
PG1
EXTI15[3:0] bits in AFIO_EXTICR4 register
PA15
PB15
PC15
PD15
PE15
PF15
PG15
Section 7.3.7: APB2 peripheral clock enable register
for low-, medium-, high- and XL-density devices and, to
for connectivity line devices.
DocID13902 Rev 15
Interrupts and events
EXTI0
EXTI1
EXTI15
Section 8.3.7: APB2 peripheral
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