Usart Register Map; Table 200. Usart Register Map And Reset Values - ST STM32F101 series Reference Manual

RM0008
27.6.8

USART register map

The table below gives the USART register map and reset values.
Offset Register
USART_SR
0x00
Reset value
USART_DR
0x04
Reset value
USART_BRR
0x08
Reset value
USART_CR1
0x0C
Reset value
USART_CR2
0x10
Reset value
USART_CR3
0x14
Reset value
USART_GTPR
0x18
Reset value
Refer to
Universal synchronous asynchronous receiver transmitter (USART)

Table 200. USART register map and reset values

Reserved
Reserved
Reserved
Reserved
Table 3 on page 51 for the register boundary addresses.
Reserved
Reserved
0
Reserved
0
DocID13902 Rev 15
0 0 1 1
0 0 0
DIV_Mantissa[15:4]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
STO
P
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
GT[7:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DR[8:0]
0 0 0 0 0 0
DIV_Fraction
[3:0]
0 0 0 0 0 0
0 0 0 0 0 0
ADD[3:0]
0 0 0 0 0
0 0 0 0 0 0
PSC[7:0]
0 0 0 0 0 0
820/1128
820