Table 109. Fsmc_Bcrx Bit Fields; Table 110. Fsmc_Btrx Bit Fields - ST STM32F101 series Reference Manual

RM0008
Bit
number
31-20
19
18:16
15
14
13
12
11
10
9
8
7
6
5-4
3-2
1
0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0

Table 109. FSMC_BCRx bit fields

Bit name
Reserved 0x000
CBURSTRW 0x0 (no effect on asynchronous mode)
Reserved 0x0
Set to 1 if the memory supports this feature. Otherwise keep at
ASYNCWAIT
0.
EXTMOD 0x0
WAITEN 0x0 (no effect on asynchronous mode)
WREN As needed
WAITCFG Don't care
WRAPMOD 0x0
WAITPOL Meaningful only if bit 15 is 1
BURSTEN 0x0
Reserved 0x1
FACCEN Don't care
MWID As needed
MTYP As needed, exclude 0x2 (NOR Flash)
MUXE 0x0
MBKEN 0x1

Table 110. FSMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD Don't care
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST+1 HCLK cycles for
write accesses, DATAST+3 HCLK cycles for read accesses).
DATAST
This value cannot be 0 (minimum is 1).
ADDHLD Don't care
ADDSET Duration of the first access phase (ADDSET+1 HCLK cycles).
DocID13902 Rev 15
Flexible static memory controller (FSMC)
Value to set
Value to set
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