Figure 189. Modea Read Accesses; Figure 190. Modea Write Accesses - ST STM32F101 series Reference Manual

Flexible static memory controller (FSMC)
Mode A - SRAM/PSRAM (CRAM) OE toggling
1. NBL[1:0] are driven low during read access.
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Figure 189. ModeA read accesses

A[25:0]
NBL[1:0]
NEx
NOE
NWE
High
D[15:0]

Figure 190. ModeA write accesses

A[25:0]
NBL[1:0]
NEx
NOE
NWE
D[15:0]
(ADDSET +1)
DocID13902 Rev 15
Memory transaction
(ADDSET +1) (DATAST + 1)
HCLK cycles HCLK cycles
Memory transaction
HCLK cycles
data driven
by memory
2 HCLK
cycles
Data sampled Data strobe
1HCLK
data driven by FSMC
(DATAST + 1)
HCLK cycles
RM0008
ai14722c
ai14721c