ST STM32F101 series Reference Manual page 891

USB on-the-go full-speed (OTG_FS)
Bit 17 NAKSTS: NAK status
Bit 16 Reserved, must be kept at reset value.
Bit 15 USBAEP: USB active endpoint
Bits 14:2 Reserved, must be kept at reset value.
Bits 1:0 MPSIZ: Maximum packet size
OTG device endpoint-x control register (OTG_FS_DIEPCTLx) (x = 1..3, where
x = Endpoint_number)
Address offset: 0x900 + (Endpoint_number × 0x20)
Reset value: 0x0000 0000
The application uses this register to control the behavior of each logical endpoint other than
endpoint 0.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
rs rs w w w w rw rw rw rw
Bit 31 EPENA: Endpoint enable
891/1128
Indicates the following:
0: The core is transmitting non-NAK handshakes based on the FIFO status
1: The core is transmitting NAK handshakes on this endpoint.
When this bit is set, either by the application or core, the core stops transmitting data, even
if there are data available in the TxFIFO. Irrespective of this bit's setting, the core always
responds to SETUP data packets with an ACK handshake.
This bit is always set to 1, indicating that control endpoint 0 is always active in all
configurations and interfaces.
The application must program this field with the maximum packet size for the current logical
endpoint.
00: 64 bytes
01: 32 bytes
10: 16 bytes
11: 8 bytes
TXFNUM
rw/
rw rw
rs
The application sets this bit to start transmitting data on an endpoint.
The core clears this bit before setting any of the following interrupts on this endpoint:
– SETUP phase done
– Endpoint disabled
– Transfer completed
DocID13902 Rev 15
Reserved
r r rw
9 8 7 6 5 4
MPSIZ
rw rw rw rw rw rw rw rw rw rw rw
RM0008
3 2 1 0