How To Program The Watchdog Timeout; Figure 184. Window Watchdog Timing Diagram - ST STM32F101 series Reference Manual

Window watchdog (WWDG)
case, the corresponding interrupt service routine (ISR) should reload the WWDG counter to
avoid the WWDG reset, then trigger the required actions.
The EWI interrupt is cleared by writing '0' to the EWIF bit in the WWDG_SR register.
Note: When the EWI interrupt cannot be served, e.g. due to a system lock in a higher priority task,
the WWDG reset will eventually be generated.
20.4

How to program the watchdog timeout

You can use the formula in
Warning:
The formula to calculate the timeout value is given by:
where:
t
WWDG
t
PCLK1
Refer to the table below for the minimum and maximum values of the T
493/1128
Figure 184
When writing to the WWDG_CR register, always write 1 in the
T6 bit to avoid generating an immediate reset.

Figure 184. Window watchdog timing diagram

t t
=
WWDG PCLK1
: WWDG timeout
: APB1 clock period measured in ms
DocID13902 Rev 15
to calculate the WWDG timeout.
WDGTB
× × ×
4096 2
t
( [ ] ) ( )
5:0 1 ms
+
WWDG.
RM0008