ST STM32F101 series Reference Manual page 116

RM0008
Bit 22 I2C2EN: I2C2 clock enable
Bit 21 I2C1EN: I2C1 clock enable
Bit 20 UART5EN: USART5 clock enable
Bit 19 UART4EN: USART4 clock enable
Bit 18 USART3EN: USART3 clock enable
Bit 17 USART2EN: USART2 clock enable
Bits 16 Reserved, always read as 0.
Bit 15 SPI3EN: SPI 3 clock enable
Bit 14 SPI2EN: SPI2 clock enable
Bits 13:12 Reserved, must be kept at reset value.
Bit 11 WWDGEN: Window watchdog clock enable
Bits 10:9 Reserved, must be kept at reset value.
Bit 8 TIM14EN: TIM14 timer clock enable
Low-, medium-, high- and XL-density reset and clock control (RCC)
Set and cleared by software.
0: I2C2 clock disabled
1: I2C2 clock enabled
Set and cleared by software.
0: I2C1 clock disabled
1: I2C1 clock enabled
Set and cleared by software.
0: USART5 clock disabled
1: USART5 clock enabled
Set and cleared by software.
0: USART4 clock disabled
1: USART4 clock enabled
Set and cleared by software.
0: USART3 clock disabled
1: USART3 clock enabled
Set and cleared by software.
0: USART2 clock disabled
1: USART2 clock enabled
Set and cleared by software.
0: SPI 3 clock disabled
1: SPI 3 clock enabled
Set and cleared by software.
0: SPI2 clock disabled
1: SPI2 clock enabled
Set and cleared by software.
0: Window watchdog clock disabled
1: Window watchdog clock enabled
Set and cleared by software.
0: TIM14 clock disabled
1: TIM14 clock enabled
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