Spi Interrupts; Table 182. Spi Interrupt Requests - ST STM32F101 series Reference Manual

Advanced arm-based 32-bit mcus

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Serial peripheral interface (SPI)

This flag is used to verify the validity of the value received when the CRCEN bit in the

SPI_CR1 register is set. The CRCERR flag in the SPI_SR register is set if the value

received in the shift register does not match the receiver SPI_RXCRCR value.

SPI interrupts

Transmit buffer empty flag

Receive buffer not empty flag

Master Mode fault event

Overrun error

CRC error flag

Interrupt event

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