Figure 318. Receive Fifo Packet Read - ST STM32F101 series Reference Manual

RM0008
5. After the data payload is popped from the receive FIFO, the RXFLVL interrupt
(OTG_FS_GINTSTS) must be unmasked.
6. Steps 1–5 are repeated every time the application detects assertion of the interrupt line
due to RXFLVL in OTG_FS_GINTSTS. Reading an empty receive FIFO can result in
undefined core behavior.
Figure 318
• SETUP transactions
This section describes how the core handles SETUP packets and the application's
sequence for handling SETUP transactions.
•
Application requirements
1. To receive a SETUP packet, the STUPCNT field (OTG_FS_DOEPTSIZx) in a control
OUT endpoint must be programmed to a non-zero value. When the application
programs the STUPCNT field to a non-zero value, the core receives SETUP packets
and writes them to the receive FIFO, irrespective of the NAK status and EPENA bit
setting in OTG_FS_DOEPCTLx. The STUPCNT field is decremented every time the
control endpoint receives a SETUP packet. If the STUPCNT field is not programmed to
a proper value before receiving a SETUP packet, the core still receives the SETUP
packet and decrements the STUPCNT field, but the application may not be able to
completed. After this entry is popped from the receive FIFO, the core asserts a
Transfer Completed interrupt on the specified OUT endpoint.
provides a flowchart of the above procedure.

Figure 318. Receive FIFO packet read

wait until RXFLVL in OTG_FS_GINTSTSG
rd_data = rd_reg (OTG_FS_GRXSTSP);
Y
packet mem[0: word_cnt – 1] =
store in rd_rxfifo(rd_data.EPNUM,
memory
DocID13902 Rev 15
USB on-the-go full-speed (OTG_FS)
rd_data.BCNT = 0
N
word_cnt)
rcv_out_pkt ()
word_cnt =
BCNT[11:2] + C
(BCNT[1] | BCNT[1])
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