Rtc Main Features - ST STM32F101 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0008
18.2

RTC main features

Programmable prescaler: division factor up to 2
32-bit programmable counter for long-term measurement
Two separate clocks: PCLK1 for the APB1 interface and RTC clock (must be at least
four times slower than the PCLK1 clock)
The RTC clock source could be any of the following ones:
Two separate reset types:
Three dedicated maskable interrupt lines:
HSE clock divided by 128
LSE oscillator clock
LSI oscillator clock (refer to
The APB1 interface is reset by system reset
The RTC Core (Prescaler, Alarm, Counter and Divider) is reset only by a Backup
domain reset (see
Section 7.1.3: Backup domain reset on page
Alarm interrupt, for generating a software programmable alarm interrupt.
Seconds interrupt, for generating a periodic interrupt signal with a programmable
period length (up to 1 second).
Overflow interrupt, to detect when the internal programmable counter rolls over to
zero.
DocID13902 Rev 15
20
Section 7.2.8: RTC clock
Real-time clock (RTC)
for details)
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Stm32f107 seriesStm32f102 seriesStm32f103 seriesStm32f105 seriesStm32f101 series

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