ST STM32F101 series Reference Manual page 107

Low-, medium-, high- and XL-density reset and clock control (RCC)
Bit 15 ADC3RST: ADC3 interface reset
Bit 14 USART1RST: USART1 reset
Bit 13 TIM8RST: TIM8 timer reset
Bit 12 SPI1RST: SPI1 reset
Bit 11 TIM1RST: TIM1 timer reset
Bit 10 ADC2RST: ADC 2 interface reset
Bit 9 ADC1RST: ADC 1 interface reset
Bit 8 IOPGRST: IO port G reset
Bit 7 IOPFRST: IO port F reset
Bit 6 IOPERST: IO port E reset
Bit 5 IOPDRST: IO port D reset
107/1128
Set and cleared by software.
0: No effect
1: Reset ADC3 interface
Set and cleared by software.
0: No effect
1: Reset USART1
Set and cleared by software.
0: No effect
1: Reset TIM8 timer
Set and cleared by software.
0: No effect
1: Reset SPI1
Set and cleared by software.
0: No effect
1: Reset TIM1 timer
Set and cleared by software.
0: No effect
1: Reset ADC 2 interface
Set and cleared by software.
0: No effect
1: Reset ADC 1 interface
Set and cleared by software.
0: No effect
1: Reset IO port G
Set and cleared by software.
0: No effect
1: Reset IO port F
Set and cleared by software.
0: No effect
1: Reset IO port E
Set and cleared by software.
0: No effect
1: Reset IO port D
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